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TMS320C6424 : edma3 syncAB

fabio di gennaro
Prodigy 60 points

I need to transfer data in  contiunuos mode, from the serial mcbsp to a buffer (either
or ping pong) as follows:

 

                                       McBsp                                                                                  Buffer (PcmToVoipPing or PcmToVoipPong)

d160 c160 b160 a160 ........       d2 c2 b2 a2 d1 c1 b1 a1    ------------------>     a1..............a160 b1........b160c1.........c160d1.........d160

I used the following parameters

init mcbsp

    mcbspRegs->PCR =    CSL_FMKT(MCBSP_PCR_FSXM,EXTERNAL)
                      |    CSL_FMKT(MCBSP_PCR_FSRM,EXTERNAL) //internal fram sync
                      |    CSL_FMKT(MCBSP_PCR_CLKXM,INPUT)  //trans clock mode
                      |    CSL_FMKT(MCBSP_PCR_CLKRM,INPUT)  //receive clock mode
                      |    CSL_FMKT(MCBSP_PCR_CLKRP,RISING) // fase receive
                      |    CSL_FMKT(MCBSP_PCR_CLKXP,FALLING);// fase trans
 
    mcbspRegs->RCR =    CSL_FMKT(MCBSP_RCR_RDATDLY,1BIT)
                    |    CSL_FMKT(MCBSP_RCR_RWDLEN1,8BIT)
                    |    CSL_FMKT(MCBSP_RCR_RPHASE,SINGLE_FRM)
                    |    CSL_FMK(MCBSP_RCR_RFRLEN1,63);   


 
    mcbspRegs->XCR =      CSL_FMKT(MCBSP_XCR_XDATDLY,1BIT)
                    |    CSL_FMKT(MCBSP_XCR_XWDLEN1,8BIT)
                    |     CSL_FMKT(MCBSP_XCR_XPHASE,SINGLE_FRM)
                    |     CSL_FMK(MCBSP_XCR_XFRLEN1,63);   

    mcbspRegs->MCR =    CSL_FMKT(MCBSP_MCR_RMCME,PARTITIONS8)
                    |    CSL_FMKT(MCBSP_MCR_RMCM,CHDISABLE)
                    |    CSL_FMKT(MCBSP_MCR_XMCME,8PARTITION)
                    |    CSL_FMKT(MCBSP_MCR_XMCM,DISABLE);

    mcbspRegs->RCERE0=0x0;
    mcbspRegs->RCERE1=0xF000000;

init EDMA :

             edma3ccRegs->EESR=(32);

                edma3ccRegs->IESR=(32);

              edma3ccRegs->PARAMSET[5].OPT=0x905004;
    edma3ccRegs->PARAMSET[5].A_B_CNT=0x40001;
    edma3ccRegs->PARAMSET[5].SRC=(Uint32)&(mcbspRegs->DRR);
    edma3ccRegs->PARAMSET[5].DST=(Uint32)PcmToVoipPing;
    edma3ccRegs->PARAMSET[5].SRC_DST_BIDX=0xA00000;
    edma3ccRegs->PARAMSET[5].LINK_BCNTRLD=0x04840;
    edma3ccRegs->PARAMSET[5].SRC_DST_CIDX=0x10000;
    edma3ccRegs->PARAMSET[5].CCNT=0xA0;

    edma3ccRegs->PARAMSET[66].OPT=0x905004;
    edma3ccRegs->PARAMSET[66].A_B_CNT=0x40001;
    edma3ccRegs->PARAMSET[66].SRC=(Uint32)&(mcbspRegs->DRR);
    edma3ccRegs->PARAMSET[66].DST=(Uint32)PcmToVoipPong;
    edma3ccRegs->PARAMSET[66].SRC_DST_BIDX=0xA00000;
    edma3ccRegs->PARAMSET[66].LINK_BCNTRLD=0x04860;
    edma3ccRegs->PARAMSET[66].SRC_DST_CIDX=0x10000;
    edma3ccRegs->PARAMSET[66].CCNT=0xA0;

    edma3ccRegs->PARAMSET[67].OPT= 0x905004;
     edma3ccRegs->PARAMSET[67].A_B_CNT=0x40001;
    edma3ccRegs->PARAMSET[67].SRC=(Uint32)&(mcbspRegs->DRR);
    edma3ccRegs->PARAMSET[67].DST=(Uint32)PcmToVoipPing;
    edma3ccRegs->PARAMSET[67].SRC_DST_BIDX=0xA00000;
    edma3ccRegs->PARAMSET[67].LINK_BCNTRLD=0x04840;
    edma3ccRegs->PARAMSET[67].SRC_DST_CIDX=0x10000;
    edma3ccRegs->PARAMSET[67].CCNT=0xA0;

    /*  strart seriale Mcbsp */
    CSL_FINST(mcbspRegs->SPCR,MCBSP_SPCR_GRST,RESET);   //SRGR out of reset
    CSL_FINST(mcbspRegs->SPCR,MCBSP_SPCR_FRST,RESET); 
    CSL_FINST(mcbspRegs->SPCR,MCBSP_SPCR_RRST,ENABLE); //receiver enable
    CSL_FINST(mcbspRegs->SPCR,MCBSP_SPCR_XRST,ENABLE); //transmitter enable

but as a result I transfer only 2 frame  and I have 2 call interrupt

have I  wrong to set some parameter?

  • 0
    TI__Mastermind 18130 points

    Hi Fabio,

    I think I see a few problems with your config structures, but I would like to work out why you have configured them this way so we can discover the root cause of the problem. First off, because you are reading from a serial port keep in mind that the EDMA is limited to how quickly it can read data from that peripheral. This means the EDMA must wait for the McBSP port to signal that it has new data to send it.

    I see that you are reading in 8-bit data from the McBSP which corresponds to an ACNT value of 1; however, because your EDMA channel is A/B synchronized the EDMA is going to attempt to read four different 8-bit values every time the McBSP gets a single value. A/B sync means that every time the McBSP generates an event the EDMA will copy A*B number of bytes. As such you should change the SYNCDIM property of the OPT register to a 0.

    Additionally, because you are changing to A synchronization you will need to modify the BCNTRLD to equal BCNT (4). BCNTRLD is used to reconfigure the BCNT every time CCNT decrements (see spruem5a Table 2-4 on p33).  

    All of your indexing looks good and I foresee no problems there.

    Finally, I see that you have set the ITCCHEN bit but I am not sure why. ITCCHEN means that every time you complete an A transfer you will generate an event to the EDMA channel specified by the TCC field, which in your case is 5. This means you will automatically blow through your entire A*B*C number of elements anytime a single McBSP event is generated. Because the EDMA needs to wait for the McBSP for every event you should disable the ITCCHEN bit.