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RE: UPP as receiver can`t drive WAIT high?

long gao
Intellectual 770 points
hello,RandyP.recently i am using upp to do a application. i have set the FREE=0 and SOFT=1. and then enable the wait bit in the uppicr, then i change the waitpola to halt the upp. and the receive can be halt, but when i reset the waitpola, the data i receive from upp, is not continuity with the data when it be halt. i want ask why this happen? and how make it continuity?
  • 0
    TI__Guru* 81335 points

    Hi Long gao,

    Welcome to the TI E2E forum. I hope you will find many good answers here and in the TI.com documents and in the TI Wiki Pages (for processor issues). Be sure to search those for helpful information and to browse for the questions others may have asked on similar topics (e2e.ti.com). Please read all the links below my signature.

    This thread has been split from below thread,

    We will get back to you on the above query shortly. Thank you for your patience.

    Note: We strongly recommend you to create new e2e thread for your queries instead of following up on an old/closed e2e thread, new threads gets more attention than old threads and can provide link of old threads or information on the new post for clarity and faster response.

  • 0
    TI__Guru* 81335 points
    Long gao,
    Please provide the DSP part number used. The query has been asked on single core DSP forum.
    e2e.ti.com/.../83542

    Thank you.