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OMAP L138 PUPDSEL[x] Registers

Inderjit Bains
Expert 2745 points
Other Parts Discussed in Thread: OMAP-L138, OMAPL138, AM1808, OMAP3530

In OMAP-L138 Applications Processor System Reference Guide (SPRUGM7C), table 10-55:  where are the CP[x] groups defined?  For example, which pins are in CP[0]?  Most CPUs have pullup/pulldowns configurable by pin, not pin group and are usually defined in the GPIO registers, but this CPU is completely different.

  • 0
    TI__Guru* 84185 points

    Inderjit

    The CP[x] groups are defined/stated in the datasheet as a column(Pull column)  for each IO pin in the Terminal functions that supports this configurable pull up.

    Inderjit Bains said:
    Most CPUs have pullup/pulldowns configurable by pin, not pin group and are usually defined in the GPIO registers, but this CPU is completely different.

    I can speak for the devices that I have supported out of TI,  for these type of SoC's: OMAPL138/c6748/AM1808 are the first set of devices that offer the configurability/programmability to enable/disable or change the configuration from a pull up to pull down or vice versa. In most of the previous devices there as a default IPD or IPU with no additional configurability.

    I'd be interested in understanding what device you are referring to, that provide pin by pin configurability for this. I'd appreciate if you could point me to some device datasheets as example.

    Thanks

    Mukul

  • 0 in reply to Mukul Bhatnagar
    Expert 2745 points

    Example:  OMAP3530.  This is a TI CPU!!!

    Datasheet:  http://focus.ti.com/lit/ug/spruf98g/spruf98g.pdf

    Section 7.6.3.2 PADCONFS Register Description

    Your answer is frankly nonsense.  I asked which pins are included in each CP[x] group.  Where is this specified?

     

  • 0 in reply to Inderjit Bains
    TI__Guru* 84185 points

    Inderjit Bains said:
    Example:  OMAP3530.  This is a TI CPU!!!

    Good I learned something new! I wish I knew all the CPUs that we offer (WIP)

     

    Inderjit Bains said:
    Your answer is frankly nonsense. 

    Keep up with this attitude and unwarranted comments, and it will surely motivate us to keep answering your questions!

    Inderjit Bains said:
    I asked which pins are included in each CP[x] group.  Where is this specified?

    Look in the datasheet, example attached, do you now see the column with heading "PULL" mentioning CP[17] for EMIFA pins? That information is provided in the terminal functional table for all dual LVCMOS IOs that have a configurable pull up/ pull down control

     

  • 0 in reply to Mukul Bhatnagar
    Expert 2745 points

    In the future, please provide complete answers to questions.  Your answer was vague - it did not point me to a table or provide any specific information.  And your link didn't work, but I found the tables in SPRS586A (L138 datasheet).