detection on the DM365 TVOUT

Hello,

could you please tell me,  is the TVINT feature not supported too?

Thank you.

SPRUFG5A–April 2009–Revised August 2009 recommended to set the VDAC_CONFIG  values for SD DAC and HD DAC: HD DAC -> 0x1019 41E7h ; SD DAC -> 0x1019 41DCh

BUT, the kernel set VDAC_CONFIG value 0x081141CF, both NTSC and PAL.

And, when I use 0x1019 41DC value, I get a Chroma Level lower then Normal (Internal Colorbar, tested by VM700), compared to 0x081141CF, Chroma Level is right.

Is there some thing wrong with the recommended value?

Paul,

if I set the value of VDAC_CONFIG to 0x081141CC, I am writing 11 to bits 6 and 7 which the dtasheet says must always be written zeroes?  will it break anything or is it also a typo in the document?  I am using  PAL SD out put and from the configuration as prescribed it looks like only ch-c is driving the composite output with ch-b and ch-a being powered-down and would only be used for s-video or component out mode.  Is this assumption correct?  I am trying to solve an issue with the DAC writing to lines 23, 24 and 25 and was pointed to looking at the DAC configuration in order to find out who and what is writing anything to those lines as per definition is should be "user" lines although not seen on a TV I want to put left-edge encoded data in there ( at least in lines 24 and 25).  I am sneeking around the driver and see configurations of upper- and left-margins but do not know exactly where to look for finding the DAC values that configures the way it is making lines on the output.  Any help on this would also be appreciated.

Thanks, Jinh T.

Jinh, I am working with our design on this issue and will get back to you ASAP.

Quick question though, where do you see "I am writing 11 to bits 6 and 7 which the dtasheet says must always be written zeroes"? In the UG, it says value of [18:6] is 0x907, and I see R-0 on top as well. is this the part? if so, the R-0 is a typo.

Hi Paul,

Read it in table 90 on page 139 of sprufg5a.  I am currently running with the lower 3 bits of VDAC_CONFIG set (0x08114iCC) but when using composite output and only using PWD_C, why will the value of 0x081140C not work?

Thanks, Jinh T.

first of all, sprufg5a needs to be updated. Although also needing to be updated, sprufg9c is closer to what the actual value should be.

I believe you have a typo. Do you mean 0x081140CC or 0x0811410C here?

Jinh said:

why will the value of 0x081140C not work?

Bottom line: Bit 7 &6 need to be set to 1. Beisdes, they are reserved, why do you have to set them to zero?

Hi Paul,

in the value 0x081140CC, the last 8 bits is 0xCC which is 11001100 in binary and according to the datasheet, sprufg5a, table 90 it says bits 18-6 are reserved and must always be written with zeroes.  So, it I write the value 0x081140CC into register VDAC_CONFIG, surely I am going against what the datasheet so so it must be a typo in the datasheet because it if write 0x0811400C into the register the output is inactive for whatever reason.  Could you confirm that the comment in the datasheet is a typo or not.  I am currently using the value of 0x081140CC though.  I see that sprufg9c is "updated" and will use it.  Just a note for TI on how difficult it is with the loads of different datasheets for the SoC but I can understand it's quite new and hopefully get's out of it's beta-jacket very soon. 

Thanks for the response, Jinh T.

Jinh,

Thank you for your understanding, and sorry about the inconvenience this has caused. These docs were updated at slightly-different times and apparently the VDAC description are not in-sync with one another, and they were all incorrect. We are working on an update on all and should be able to update all these docs by the end of next week. Please check back then.

Nothing has been updated yet, please check back next Friday.

Just a quick clarification on the TI terminologies:.

DM365 datasheet = SPRS457C

ARM user guide = sprufg5a

VPBE user guide = sprufg9c

We want to use the TVINT to detect the TV cable connection and disconnection.

Would you like tell me how to use it?

    I did some test.

First ,I set the register VDAC_CONFIG bit 4 to 1.Then I readl the VDAC_CONFIG bit 30 ,but the value is always 0.

root@SEED_DVS365:/opt/dm365# ./readl 0x01c4002c 0 1
00000  081141FF

Hello!

I try get analog video from DM365. I read this topic and  this and set VDAC_CONFIG to 0x81141CC and before start video capture I have it, but after run capture value changed to 0x81141CF.

Why and how can I solve this? And how can I get analog video?

Thank you and excuse me for my bad english.

Kirill,

Your capture application is probably resetting the VDAC_CONFIG registers to 0x81141CF. Please do a search on that.

CF or CC shouldn't matter. We recommend ~CC because in SD mode, DAC-A/B are't used, so they don't need to be powered. However even if you power them, your output shouldn't change.

Please have a quick look at the video_loopback_sd testcase here.

regards,

Paul