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unable to get resources for DMA in spi-davinci.c of probe function

Hi ,

i am using keystoneII (k2e) arch, I want to use the dma for data transfer through spi , so im using spi-davonci.c file , but  in spi-davinci.c file  

struct resource *r= platform_get_resource(pdev, IORESOURCE_DMA, 0);

here im getting r=NULL

similarly in r = platform_get_resource(pdev, IORESOURCE_DMA, 1); //here also im getting r=NULL;

because of that  i am unable to request  " davinci_spi_request_dma(dspi); " to get dmaRx and dmaTx channel , so that communication through spi is not done !

How to get resources for IORESOURCE_DMA type ??

is there im missing something ? 

  • Hi Prakash,

    We will get back you on the above query shortly. Thank you for your patience.

  • Hi, Prakesh,

    Just curious what package do you use for K2E, MCSDK or Proc SDK, and which release?  In Keystone-2, only interrupt mode is supported in SPI. There isn't huge data expected to transfer through SPI which can not be handled using interrupt. Therefore, DMA mode is not supported nor tested.  What is your application which needs SPI with DMA support?

    Rex 

  • Hi ,
    we are using linux-03.10.61 kernel version and  MCSDK_3.0 for ARM (link for mcsdk : processors.wiki.ti.com/.../MCSDK_UG_Chapter_Exploring)

  • Hi, Prakash,

    Thanks for the info. Since DMA has never been enabled for SPI in Keystone-2 device, there are no DMA resources defined in device tree. Get resource is expected to fail.

    Rex

  • Hi Rex,

    Then how can i get the DMA resource for SPI by adding DMA resource to device tree ?, i mean what i need to add in device tree file show that i can get the resources for DMA .

    For getting the DMA resource I added following info in device tree file(keystone.dtsi) :
    /* edma3 device info */
    edma3:edma@02700000 {
    compatible = "ti,edma3";
    mem = <0x02700000 0x000C0000>;
    label = "edma3";
    interrupts = <0 314 0xf01>,
    <0 315 0xf01>,
    <0 316 0xf01>;
    #dma-cells = <1>;
    dma-channels = <64>;
    ti,edma-regions = <8>;
    ti,edma-slots = <512>;

    };
    then in the same file i added bellow spi2 device info for edma3("dmas" and "dma-names" field ) :

    /* spi2 device info */
    spi2:spi@21000800 {
    #address-cells = <1>;
    #size-cells = <0>;
    compatible = "ti,davinci-spi-v1";
    reg = <0x21000800 0x200>;
    ti,davinci-spi-num-cs = <4>;
    ti,davinci-spi-intr-line = <0>;
    interrupts = <0 300 0xf01>,
    <0 301 0xf01>,
    <0 302 0xf01>,
    <0 303 0xf01>,
    <0 304 0xf01>,
    <0 306 0xf01>;
    dmas = <&edma3 4>,
    <&edma3 5>;
    dma-names = "rx", "tx";
    clocks = <&clkspi>;
    spidev2:spi@1 {
    #address-cells = <1>;
    #size-cells = <1>;
    compatible = "rohm,dh2228fv";
    spi-max-frequency = <60000000>;
    reg = <0>;
    };
    };
    is the above information in the device tree file(keystone.dtsi) for keysone2 is sufficient ?, or else is needed ?
  • Hi, Prakash,

    As mentioned before that DMA over SPI is not supported in Keystone-2. Please provide the use case so we can evaluate and justify the support of the feature.

    Rex
  • Hi Rex,

    We are doing lot of processing for our network and don't want to spend time on SPI transactions which is required in between.
    So we want to integrate EDMA for the SPI interface controller by default so I can issue the DMA request for SPI transaction. and check the status of the transaction later on when there is some free time on CPU.

    Regards
    Prakash
  • Hi, Prakash,

    What component is connected at the other end of SPI, storage, an FPGA or something? As I mentioned before, this feature is not supported and has never been tested. We don't know what will be involved and if it works by simply enabling it. I can submit your scenario as a requirement request. Once it gets approved, we'll deliver a tested code as a formal release.

    Rex

  • Hi Rex,
    The other end of SPI is connected to FPGA chip .
  • Hi Rex ,

    Any updated on DMA support for  SPI in keystone 2 (as discussed above) ??

  • Hi, Prakash,

    It is in the process for internal review and identified the impacts this feature has if request is accepted. I'll update you when there is a decision from LinuxCore team.

    Rex

  • Hi Rex,

    Any update please ? 

  • Hi, Prakash,

    TI development team would like to know what the target CPU load numbers are for what length of transactions (read and write) before approving the requirement. This will help to determine if DMA solved customers problem or not.

    Rex

  • Hi Rex.

    Thanks for your response.

    Actually we don't have to do lot of data transfer on SPI but we are doing lot of other CPU processing in kernel and hence cannot afford to spend CPU cycles for SPI transfers. Thats the reason we want to use EDMA for SPI.

    Hope this explains our requirement.

    Regards

    Prakash