I have several questions regarding my evaluation board:
Tcievmk2lx
EVM V1.0.3.0
SOC: 66AK2L06
I want to enable cache for DSPs and there is a user guide for that by TI. Is cache already enabled for DSPs? The same question for the Cache of ARMs. Is the cache for ARM enabled in the Linux installed by TI?
These questions can be repeated for other logics inside SOC, like: are FFTC or IQNET2 or SPI or I2C .....enabled already inside the Linux system of the evaluation board or I have to do some coding and programming to get them work?
Why there is no documentation for the Linux installed on the evaluation board? I see some devices under /dev like /dev/uio, /dev/nand, .....what is the functionality of these device files? How I can use them?
