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AM572x PMIC input capacitance

Other Parts Discussed in Thread: AM5728, TPS3808

Champs,

A design needs to guarantee safe power down sequencing of AM5728 SoC. what is the recommended hold capacitance that will allow the PMIC enough time to safely execute PD sequence.

thanks

Michael

  • This is system dependent and must be determined based on the power supply load conditions of each product.

    Regards,
    Paul

  • Michael,
    The companion PMIC for the AM572x devices will meet the required power down sequence as long as the PMIC itself and possibly a separate 3.3V supply controlled by REGEN1 are provided valid input levels for at least 1ms after shut-down is initiated. This shut-down can be initiated by driving the PMIC RESET_IN pin active. A power supervisor such as a TPS3808 or other equivalent logic can detect main power collapse and then drive RESET_IN low.
    As Paul said, the required amount of energy stored in the capacitors is design and software dependent. I recommend that this value be tuned once complete application software is operating on functional prototypes. With an initial amount of capacitance, the hold time can be measured be cutting the main supply input. This will be measured assuming nominal voltage, temperature and device conditions. Since load current can increase by as much as a factor of 3 when voltage, temperature and leakage are maximized, the circuit under nominal conditions can be tuned to provide at least 3ms of hold time for optimum selection.
    This is an interim solution, the PMIC team is planning an app note on this topic that will also contain some equations and/or measurements under various load conditions.
    Tom