support for 3-wire ?

Ran,

3-wire seems to be controlled from the below DM814x McSPI register bits:

MCSPI_CH(i)CONF

[18] IS - Input select
0x0: Data line 0 (SPI_D[0]) selected for reception.
0x1: Data line 1 (SPI_D[1]) selected for reception.

[17] DPE1 - Transmission enable for data line 1
0x0: Data line 1 (SPI_D[1]) selected for transmission
0x1: No transmission on data line 1 (SPI_D[1])

[16] DPE0 - Transmission enable for data line 0
0x0: Data line 0 (SPI_D[0]) selected for transmission
0x1: No transmission on data line 0 (SPI_D[0])

[13:12] TRM - Transmit/receive modes
0x0: Transmit and receive mode
0x1: Receive-only mode
0x2: Transmit-only mode

You will need to adjust the McSPI driver (drivers/spi/omap2_mcspi.c) according to your specific use case.

#define OMAP2_MCSPI_CHCONF_TRM_RX_ONLY BIT(12)
#define OMAP2_MCSPI_CHCONF_TRM_TX_ONLY BIT(13)
#define OMAP2_MCSPI_CHCONF_TRM_MASK (0x03 << 12)

#define OMAP2_MCSPI_CHCONF_DPE0 BIT(16)
#define OMAP2_MCSPI_CHCONF_DPE1 BIT(17)
#define OMAP2_MCSPI_CHCONF_IS BIT(18)

Adjust functions omap2_mcspi_setup_transfer().

Note also that this driver is updated in more recent kernels (3.x, 4.x), it is now named spi-omap2-mcspi.c and is updated like:

/* standard 4-wire master mode: SCK, MOSI/out, MISO/in, nCS
* REVISIT: this controller could support SPI_3WIRE mode.
*/
if (mcspi->pin_dir == MCSPI_PINDIR_D0_IN_D1_OUT) {
l &= ~OMAP2_MCSPI_CHCONF_IS;
l &= ~OMAP2_MCSPI_CHCONF_DPE1;
l |= OMAP2_MCSPI_CHCONF_DPE0;
} else {
l |= OMAP2_MCSPI_CHCONF_IS;
l |= OMAP2_MCSPI_CHCONF_DPE1;
l &= ~OMAP2_MCSPI_CHCONF_DPE0;
}

Regards,
Pavel