DDR initialization failure on TI LCDKOMAPL138 board.

Rong Wang2

Other Parts Discussed in Thread: OMAP-L138, OMAPL138

I failed to load my test code to my TI LCDKOMAPL138 board. see error message below. But I have not problem to load code to my Logic PD - Zoom™ OMAP-L138 eXperimenter Kit. both boards use OMAP-L138 DSP.

using the same GEL file. does this indicate a hardware issue?

C674X_0: Output: Target Connected.
C674X_0: Output: ---------------------------------------------
C674X_0: Output: Memory Map Cleared.
C674X_0: Output: ---------------------------------------------
C674X_0: Output: Memory Map Setup Complete.
C674X_0: Output: ---------------------------------------------
C674X_0: Output: PSC Enable Complete.
C674X_0: Output: ---------------------------------------------
C674X_0: Output: PLL0 init done for Core:300MHz, EMIFA:25MHz
C674X_0: Output: DDR initialization is in progress....
C674X_0: Trouble Writing Memory Block at 0x1e1a110 on Page 0 of Length 0x4: (Error -1137 @ 0x1E1A110) Device is held in reset. Take the device out of reset, and retry the operation. (Emulation package 5.1.507.0)
C674X_0: GEL: Error while executing OnTargetConnect(): Target failed to write 0x01E1A110 at *((unsigned int *) (0x01E1A000+0x110))=PLLM [C6748_LCDK.gel:43] at device_PLL1(24, 1, 0, 1, 2) [C6748_LCDK.gel:406] at Set_DDRPLL_150MHz() [C6748_LCDK.gel:424] at Set_DDR2_150MHz() [C6748_LCDK.gel:459] at Core_300MHz_mDDR_150MHz() [C6748_LCDK.gel:245] at OnTargetConnect() .

Thanks in advance!

Ron

over 9 years ago

0 Senthilkumar Srinivasan over 9 years ago

TI__Mastermind 43660 points

Ron,

Are you trying to initialize the LCDK using the gel file available in below path ?

ti\ccsv6\ccs_base\emulation\boards\lcdkomapl138\gel\OMAP-L138_LCDK.gel

Regards,
Senthil

0 Senthilkumar Srinivasan over 9 years ago in reply to Senthilkumar Srinivasan

TI__Mastermind 43660 points

Ron,

You could also try if you can access the PLL1_PLLM register at 0x01E1A110 directly ?

From your log, it seems like device does not able to write the PLLM value on the register. Have you tried recycling the power ?

Are you always getting the same error ?

Regards,
Senthil

0 Rong Wang2 over 9 years ago in reply to Senthilkumar Srinivasan

Expert 1420 points

Hi Senthil,

yes, I always got the same error. I tried OMAP-L138_LCDK.gel, C6748_LCDK.gel and C6748.gel, and got the same error. It seems to have problem configure PLL1, in particular, have problem to access to (0x01E1A000+0x110))=PLLM .
If I comment out the function setting PLL1 and mDDR in GEL file, I am able to load my test code and it runs. In this case, I am able to access to this register directly.

Thanks,

Ron

0 Titusrathinaraj Stalin over 9 years ago in reply to Rong Wang2

TI__Guru** 116100 points

Dear Ron,

What is your emulator ?

I presume that you are using XDS100.

Can you please try to enable the adaptive clocking with 1MHz ?

C674X_0: GEL: Error while executing OnTargetConnect(): Target failed to write 0x01E1A110 at *((unsigned int *) (0x01E1A000+0x110))=PLLM [C6748_LCDK.gel:43] at device_PLL1(24, 1, 0, 1, 2) [C6748_LCDK.gel:406] at Set_DDRPLL_150MHz() [C6748_LCDK.gel:424] at Set_DDR2_150MHz() [C6748_LCDK.gel:459] at Core_300MHz_mDDR_150MHz() [C6748_LCDK.gel:245] at OnTargetConnect() .

You have mentioned that you are using OMAPL138 but "C6748_LCDK.gel" gel file is used.

So please make sure that you have chosen board as "OMAPL138 LCDK board" and correct emulator, you no need to change any gel file settings manually.

Firstly connect the ARM core to initialize the peripherals via gel file "OMAP-L138_LCDK.gel" and then connect DSP core.

This target configuration setting is for OMAPL138 LCDK board with XDS510 USB emulator.

processors.wiki.ti.com/.../GSG:Debugging_projects_v5

processors.wiki.ti.com/.../Debug_Handbook_for_CCS

0 Rong Wang2 over 9 years ago in reply to Titusrathinaraj Stalin

Expert 1420 points

Hi Titus,

I am uisng XDS200. I actually tried 3 GEL files(OMAPL138_LCDK.gel, C6748_LCDK.gel and C6748.gel), but got the same error. It seems to be unable to programm PLL1 using GEL file. I enabled the adaptive clocking with 1MHz, but it did not help.

I tried this emulator with my eXperimenter board from Logic PD, and it works fine with any of the 3 GEL files. I only have this issue with TI LCDKOMAPL138 board. is there addional setting to be done on this board?

Thanks,

Rong

0 Titusrathinaraj Stalin over 9 years ago in reply to Rong Wang2

TI__Guru** 116100 points

What boot mode you set on OMAPL138 LCDK board ?

Can you please try to set boot mode to UART and check ?

How you are connecting the target and running the gel file ?

ARM core should point out the gel (OMAPL138_LCDK.gel) and DSP should point nothing as I given below.

When you connect the ARM core first then gel file will be called and then connect the DSP core.

You should get the log like below.

The reason why I am asking you to connect ARM first is that in OMAPL138, ARM is the master core, it will come out from sleep after power ON and DSP core can be wake up by ARM.

0 Rong Wang2 over 9 years ago in reply to Titusrathinaraj Stalin

Expert 1420 points

Hi Titus,

the SW1 on the board is set as : 2,3,4 are on by default. The sw1 is sealed and seems to not allow you to change it.
I use XDS200 USB emulator to download my test build to DSP and run gel file to init DSP.
In my CCS(v6.1.2), I don't see OMAPL138 LCDK, but only C6748 LCDK available. so I don't see ARM core in target configureation.
I only see URAT2, NAND16 and MMC/SD boot mode using SW1. is the default boot mode is not valid for using emulator download?

Thanks,

Ron

0 Titusrathinaraj Stalin over 9 years ago in reply to Rong Wang2

TI__Guru** 116100 points

Boot mode setting seems to be "NAND" flash be2e.ti.com/.../528736 mode.

Try to set boot mode to UART2, refer to the below TI wiki for that.
processors.wiki.ti.com/.../C6748_Development_Kit_(LCDK)

0 Rong Wang2 over 9 years ago in reply to Titusrathinaraj Stalin

Expert 1420 points

Hi Titus,

I tried to let ARM core point out the gel (OMAPL138_LCDK.gel) and DSP point nothing as suggested, however, in this case, the gel file is not called. Did I miss something?

Thanks,

Ron

0 Rong Wang2 over 9 years ago in reply to Rong Wang2

Expert 1420 points

Hi all,

This problem is fixed after changed sw1 switch from NAND boot mode to other(all off except 5 and 8). Now I am able to download my code to DSP.

thanks all of you !

Ron

0 Titusrathinaraj Stalin over 9 years ago in reply to Rong Wang2

TI__Guru** 116100 points

Glad to hear that your problem was solved.
Thanks for the update.

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DDR initialization failure on TI LCDKOMAPL138 board.