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hyperlink interrupt exception

hao tang
Prodigy 60 points

hello，everybody

         In my project,there are two C6678 connected together with a Hyperlink cable and five boards. I've successfully got  issue for passing an interrupt from one DSP to an other DSP on four boards,but on the other board, the DSP always receives exception interrupt.In Hyperlink status register,the lError  bit and rError bit  are all be set to 1,I know this means there is catastrophic wrong in hyperlink communication.The phenomenon  especially appears at the board powered up about 1 minute,the hyperlink is ok,when the board is power up again.

         So,I have two questions:

         1.What reason would result in this phenomenon?

         2.What method can be used to solve the problem  while the DSPs is not reseted through powering down the board.

thanks a lot

     

  • 0
    TI__Guru* 81335 points

    Welcome to the TI E2E forum. I hope you will find many good answers here and in the TI.com documents and in the TI Wiki Pages (for processor issues). Be sure to search those for helpful information and to browse for the questions others may have asked on similar topics (e2e.ti.com). Please read all the links below my signature.

    We will get back to you on the above query shortly. Thank you for your patience.

    Note: We strongly recommend you to create new e2e thread for your queries instead of following up on an old/closed e2e thread, new threads gets more attention than old threads and can provide link of old threads or information on the new post for clarity and faster response.

  • 0 in reply to Raja
    TI__Guru* 95265 points

    Please clarify the setup: Are you using 6678 EVM or your customized board? C6678 only have 1 Hyperlink port, so two C6678 SOCs can connected together in a pair. What do you mean 5 boards, how they are connected?

    What is your SW release number? MCSDK or Processor SDK? what is the Hyperlink baud rate? How many lanes?

    What made the 5th board so special? Any operation sequence to make it failure? lerror and rerror and severe failure indicating link quality problem.

    Need understand those basics and what specific to 5th board.

    Regards, Eric 

     

  • 0 in reply to lding
    Prodigy 60 points

    We have manufactured five customized boards,and there are two C6678 SOCs on every board,The two C6678  SOCs communicate with each other using 4X lanes mode ,1.25G HyperLink.

    Our project is based on MCSDK_2_01_02_06,pdk_C6678_1_1_2_6 and CCS5.4.0.

    Five boards is just same including operation sequence.

    I don't know what reason lead to the failure.The eye pattern of hyperlink has been measured,and is ok.

    I very want to know if there is any method to solve this problem using the ways of SW.Example reset hyperlink or restart DSP's software,and so on

    Regards.

  • 0 in reply to hao tang
    TI__Guru* 95265 points

    1.25G is pretty low speed of hyperlink, I am not sure how this can have error. If you only interested in how to handle this in SW, on both-ends:

    - control register (offset 0x4), set bit 0 to 1 to put Hyperlink into reset

    - status register (offset 0x8), write 1 to bit 7, 8 to clear lerror and rerror

    - ECC Error Counters Register (offset 0x4c), write 0 to clear it

    - control register (offset 0x4), clear bit 0 to bring Hyperlink out of reset

    Try this if helps to recover it.

    Regards, Eric