• State Resolved
  • Locked Locked
  • Replies 5 replies
  • Answers 2 answers
  • Subscribers 98 subscribers
  • Views 1588 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

AM572x GPMC Wait

Shareef
Expert 1985 points
Other Parts Discussed in Thread: AM5728

Hi,

I have two questions to ask when interfacing GPMC to NOR memory. Is it mandatory to use the Wait signal?

And if there are multiple memory devices (say 4) then how do we connect the WAIT signals from memory to GPMC of AM5728 which has only two wait pins. Can Wait pins of all memory devices be tied and connected to WAIT0 pin of AM5728 for wait state monitoring?


Regards,

Shareef

  • 0
    TI__Guru**** 393215 points
    Hi,

    No, wait signal is not mandatory for NOR devices. It should be used only if the NOR requires it.
    Yes, wait signal outputs are usually open drain, which means that you can tie them together with a common pullup resistor. However you must ensure that all the external devices have open drain outputs.
  • 0 in reply to Biser Gatchev-XID
    Expert 1985 points
    Hi Biser,

    Thanks for responding.
    The NOR device provides the WAIT output pin but I am not sure how do i check if it is mandatory to be used or not?

    Secondly, looks like the WAIT pin on the NOR device is not open-drain. In this case, will it be safe to tie all of them together? The NOR memory part I am looking at is "MT28GU01GAAA2EGC" from Micron...

    Regards,
    Shareef
  • 0 in reply to Shareef
    TI__Guru**** 393215 points

    Khader Shareef said:
    The NOR device provides the WAIT output pin but I am not sure how do i check if it is mandatory to be used or not?

    This should be stated in the NOR datasheet.

    Khader Shareef said:
    Secondly, looks like the WAIT pin on the NOR device is not open-drain. In this case, will it be safe to tie all of them together?

    No. You will either need to tie it to a separate wait input, or place an open drain buffer.

  • 0 in reply to Biser Gatchev-XID
    Expert 1985 points
    Hi Biser,

    The NOR datasheet states In WAIT pin signal description that "When asserted, WAIT indicates DQ[15:0] is invalid; when de-asserted, WAIT indicates DQ[15:0] is valid". So I believe, WAIT output is mandatory to be used, is this correct?

    Using open-drain to tie all outputs should be fine if the WAIT output should not be driven by default by the NOR device without its chip select being asserted..is this the intended way of WAIT signal operation (not asserted/de-asserted when CS is HIGH)?

    Regards,
    Shareef
  • 0 in reply to Shareef
    TI__Guru**** 393215 points

    Khader Shareef said:
    The NOR datasheet states In WAIT pin signal description that "When asserted, WAIT indicates DQ[15:0] is invalid; when de-asserted, WAIT indicates DQ[15:0] is valid". So I believe, WAIT output is mandatory to be used, is this correct?

    Yes.

    Khader Shareef said:
    Using open-drain to tie all outputs should be fine if the WAIT output should not be driven by default by the NOR device without its chip select being asserted..is this the intended way of WAIT signal operation (not asserted/de-asserted when CS is HIGH)?

    If the wait output is not open drain, it will be driven high when deasserted. If another open drain wait output pulls the common line low at this time, the NOR output will burn.