Hello,
My customer is checking the power sequencing for C6655. They have now two versions of PCB(A and B) on which a C6655 is mounted. I briefly checked them and had some concerns about them. Could you please double-check ?
Best Regards,
Naoki
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Hello,
My customer is checking the power sequencing for C6655. They have now two versions of PCB(A and B) on which a C6655 is mounted. I briefly checked them and had some concerns about them. Could you please double-check ?
Best Regards,
Naoki
Senthil,
They tried to refine the waveform to suppress the leak on 1.5V power lane. I've attached them. Do you have any comments on this ?
Best Regards,
Naoki
Naoki-san,
What did the customer change between the first set of captures and the second? The first set of captures appear to show the 1.5V supply ramping slowly as soon as CVDD starts ramping. This is not expected. The second set of captures in the "refined" file shows the expected leakage from VDDT (1.0V) into VDDR (1.5V). This is known and characterized. As stated in Usage Note 10, this will not cause an issue.
They also highlight the non-monotonic ramping of the 1.0V supply. This is caused by the power supply. You may need to adjust the parameters in the power supply such as ramp rate or compensation to make this ramp monotonic.
Tom
Hi Tom,
I got some feedback from the customer. as for their fixes I heard, they added a resistance for electrical discharge to their power circuit. Also, as you suspected, they found another leak path to 1.5V and fixed it.
So you mentioned the refined power up/down sequence would be expected in the point of view of Usage Note 10, but it might be better to fix the non-monotonic ramping of 1.0V. If you have any additional comments, please let me know.
Best Regards,
Naoki
Naoki-san,
The non-monotonic power supply ramp is an issue with the power supply design. That is not our expertise. Please contact an analog apps engineer for this support.
Tom