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PCB Escape Routing for ZCN Package: mDDR/DDR2 connection

Kentxu
Intellectual 280 points
Other Parts Discussed in Thread: AM3517

In this link there's a very useful guide on routing the ZCN package:

http://processors.wiki.ti.com/index.php/AM35x_VCA_PCB_layout

Any possibility of continuing the design to show how to connect mDDR/DDR2 ?

Also, it states that "The finished routing for this example is available on the TI website (in the AM3517 product folder) in Allegro format."

Please indicate where, as I could not find it.

Thanks, Ken

  • 0
    TI__Intellectual 2655 points

    For LPDDR Routing guidelines please refer to "6.4.2.1.1 LPDDR Interface Schematic" section & for DDR2 Routing Guidelines please refer to "6.4.2.2.1 DDR2 Interface Schematic" in AM3517/05 DataSheet.

    Allegro footprints are available in more literature section...

    ZCN (Allegro 15 as well as Allegro 16)=> http://www.ti.com/litv/zip/sprr106

     

  • 0 in reply to vaibhav
    Intellectual 280 points

    Thank you for the reply Vaibhav,

     

    However, what I was looking for was not the schematic and routing giudelines in the data sheet (I have seen these), but an example of how to route these signals on the PCB.

     

    Also, not the footprint (again, I have this), but the Allegro CAD file for the fan-out example shown on the "PCB  Escape Routing for ZCN Package" wiki.

     

    Ken

  • 0 in reply to Kentxu
    TI__Guru 62945 points

    We are currently updating the example board file used to create the "PCB Escape Routing for ZCN Package" application note.  The updated example board file will be posted to the AM3517 product folder when this task has been completed. 

    The link to the updated example board file will be posted to this forum when it becomes available in the AM3517 product folder.  So you can continue monitoring this forum post to be notified when the example board file is available.

    Paul

  • 0 in reply to peaves
    Intellectual 280 points

    Hello Paul,

    Thanks for the reply and I look forward to the updated example.

    Any chance that you could include the DDR2 routing? This would be a big help to those of us embarking on this layout ...

    Cheers, Ken