AM571x DPLL_DDR clock frequency

Kzk

Hello,

I'd like to use DDR3 memory as 666MHz(1333). Could you tell me that a frequency of EMIF_DLL_FCLK set 333MHz is applicable or not? The max frequency of EMIF_DLL_FCLK is 266MHz.(< 333MHz) I guess a description of datasheet(SPRS957A) or a gel is typo. SYSCLK1 and DDR_DPLL_CLK are 20MHz.

I saw a dpll_ddr_config function in gel file. (CCSv6.1.2)
C:\ti\ccsv6\ccs_base\emulation\boards\am571x\gel\AM571x_prcm_config.gel

dpll_ddr_config(uint32_t DDR_FREQ)
{
uint32_t dpll_m, dpll_n, divm2, divh11, freq;

    freq = DDR_FREQ;
    if (666 == DDR_FREQ)
    {
          dpll_m   = 333;
          dpll_n   = 4;
          divm2    = 2;
          divh11   = 8;
    }
    else if (600 == DDR_FREQ)
    {
    .....
}

The one of the parameters is setting for 666MHz. I input these values to CCT as below. I got 333MHz for EMIF_DLL_GCLK. EMIF_DLL_GCLK and EMIF_DLL_FCLK are connected. So EMIF_DLL_FCLK is set 333MHz. Could you give me some advice?