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AM335x GPMC register question

Hi all,

   I'm working on am335x-starter-kit with SDK ti-processor-sdk-linux-am335x-evm-02.00.02.11.

I have a question in GPMC_CONFIG7_i(where i is based on cs) BIT6, TRM says: 

BIT6
Chip-select enable (reset value is 1 for CS[0] (active low) and 0 for
CS[1] to CS[5] (active low)).
0h = CS (active low) disabled
1h = CS (active low) enabled

It's seems that bit6 should always set to 1, thus enable CS, am I right?
The GPMC with net configura(GPMC_NET_CONF) in bootloader(./u-boot-2015.07+gitAUTOINC+46c915c963/arch/arm/include/asm/arch-omap3/mem.h)
also set the BIT6 to 1.

BUT

I try to write a "pseudo driver" which use ioremap to allocate a part of memory from GPMC memory, here is my pseudo code:

void __init pseudo_init(void)
{
    /* GPMC config setting */
    gpmc_cs_write_reg(GPMC_CS, GPMC_CS_CONFIG1, config[0]);
    ....
    ....
    gpmc_cs_write_reg(GPMC_CS, GPMC_CS_CONFIG7, config[6]);
    
    /* get gpmc cs request and get gpmc_memory base */
    gpmc_cs_request(GPMC_CS, 16M, (unsigned long *)&gpmc_base);
    if(err) exit;
    /* here, print the gpmc_base address */
    print(the gpmc_base address);
    /* protect the part of memory */
    request_mem_region(gpmc_base, 16M, "pseudo_mem");
    /* now, mapping */
    pseudo_base = ioremap(gpmc_base, 16M);
}

If the CONFIG7 bit6 = 1, the gpmc_base address = 0, 
but if the CONFIG7 bit = 0, the gpmc_base = 0x10xxxxxx

if the CONFIG7 bit6 = 1, I CANNOT iowrite the pseudo_base(segmentation fault)
if the CONFIG7 bit6 = 0, I CAN iowrite the pseudo_base

Why?

ps: Actually, this is a pseudo driver which means no device on GPMC