This thread has been locked.
If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.
Hi All,
We are using 7.02.00.02 SDK + J6E (dra72x ) CPU , but currently we always have HDMI failure message which is HDMI I2C master error when we type "modetest" .
Attachment files are bootlog and my dts file.
Could someone can give us a hint how to modify dts ?
Best,
Andy
/* * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ /dts-v1/; #include "dra72x.dtsi" #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/clk/ti-dra7-atl.h> #include <dt-bindings/pinmux/mux_dra7xx.h> / { model = "TI DRA722"; compatible = "ti,dra72-evm", "ti,dra722", "ti,dra72", "ti,dra7"; memory { device_type = "memory"; reg = <0x80000000 0x40000000>; /* 1024 MB */ }; reserved_mem: reserved-memory { #address-cells = <1>; #size-cells = <1>; ranges; ipu2_cma_pool: ipu2_cma@95800000 { compatible = "shared-dma-pool"; reg = <0x95800000 0x3800000>; reusable; status = "okay"; }; dsp1_cma_pool: dsp1_cma@99000000 { compatible = "shared-dma-pool"; reg = <0x99000000 0x4000000>; reusable; status = "okay"; }; ipu1_cma_pool: ipu1_cma@9d000000 { compatible = "shared-dma-pool"; reg = <0x9d000000 0x2000000>; reusable; status = "okay"; }; dsp2_cma_pool: dsp2_cma@9f000000 { compatible = "shared-dma-pool"; reg = <0x9f000000 0x800000>; reusable; status = "okay"; }; }; /* extcon_usb1: extcon_usb1 { compatible = "linux,extcon-usb-gpio"; id-gpios = <&pcf_gpio_21 1 GPIO_ACTIVE_HIGH>; }; extcon_usb2: extcon_usb2 { compatible = "linux,extcon-usb-gpio"; id-gpios = <&pcf_gpio_21 2 GPIO_ACTIVE_HIGH>; }; */ evm_3v3_sd: fixedregulator-evm_3v3_sd { compatible = "regulator-fixed"; regulator-name = "evm_3v3_sd"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; }; evm_3v3_sw: fixedregulator-evm_3v3_sw { compatible = "regulator-fixed"; regulator-name = "evm_3v3_sw"; // vin-supply = <&sysen1>; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; }; aic_dvdd: fixedregulator-aic_dvdd { /* TPS77018DBVT */ compatible = "regulator-fixed"; regulator-name = "aic_dvdd"; vin-supply = <&evm_3v3_sw>; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; }; vmmcwl_fixed: fixedregulator-mmcwl { compatible = "regulator-fixed"; regulator-name = "vmmcwl_fixed"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; //gpio = <&gpio5 8 0>; /* gpio5_8 */ startup-delay-us = <70000>; //enable-active-high; }; kim { compatible = "kim"; nshutdown_gpio = <132>; dev_name = "/dev/ttyS2"; flow_cntrl = <1>; baud_rate = <3686400>; }; btwilink { compatible = "btwilink"; }; /* vtt_fixed: fixedregulator-vtt { compatible = "regulator-fixed"; regulator-name = "vtt_fixed"; regulator-min-microvolt = <1350000>; regulator-max-microvolt = <1350000>; regulator-always-on; regulator-boot-on; //enable-active-high; vin-supply = <&sysen2>; //gpio = <&gpio7 11 GPIO_ACTIVE_HIGH>; }; */ aliases { display0 = &hdmi0; //sound0 = &primary_sound; //sound1 = &hdmi; }; hdmi0: connector@1 { compatible = "hdmi-connector"; label = "hdmi"; type = "a"; port { hdmi_connector_in: endpoint { remote-endpoint = <&tpd12s015_out>; }; }; }; tpd12s015: encoder@1 { compatible = "ti,dra7evm-tpd12s015"; pinctrl-names = "i2c", "ddc"; pinctrl-0 = <&hdmi_i2c_sel_pin &hdmi_i2c_pins_i2c>; pinctrl-1 = <&hdmi_i2c_sel_pin &hdmi_i2c_pins_ddc>; ddc-i2c-bus = <&i2c2>; mcasp-gpio = <&mcasp8>; gpios = <&pcf_hdmi 4 0>, /* P4, CT CP HPD */ <&pcf_hdmi 5 0>, /* P5, LS OE */ <&gpio7 12 0>; /* gpio7_12/sp1_cs2, HPD */ ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; tpd12s015_in: endpoint@0 { remote-endpoint = <&hdmi_out>; }; }; port@1 { reg = <1>; tpd12s015_out: endpoint@0 { remote-endpoint = <&hdmi_connector_in>; }; }; }; }; ocp { gpu: gpu@0x56000000 { gpu0-voltdm = <&voltdm_gpu>; }; }; /* primary_sound: primary_sound { compatible = "ti,dra7xx-evm-audio"; ti,model = "DRA7xx-EVM"; ti,always-on; ti,audio-codec = <&tlv320aic3106>; ti,mcasp-controller = <&mcasp3>; ti,codec-clock-rate = <11289600>; clocks = <&atl_clkin2_ck>; clock-names = "mclk"; ti,audio-routing = "Headphone Jack", "HPLOUT", "Headphone Jack", "HPROUT", "Line Out", "LLOUT", "Line Out", "RLOUT", "MIC3L", "Mic Jack", "MIC3R", "Mic Jack", "Mic Jack", "Mic Bias", "LINE1L", "Line In", "LINE1R", "Line In"; }; */ btwilink_sound: btwilink_sound { #sound-dai-cells = <0>; compatible = "linux,bt-sco-audio"; status = "okay"; }; simple_bt_sco_card: bt_sco_card { compatible = "simple-audio-card"; simple-audio-card,name = "DRA7xx-WiLink"; simple-audio-card,format = "dsp_a"; simple-audio-card,frame-master = <&btwilink_codec>; simple-audio-card,bitclock-master = <&btwilink_codec>; simple-audio-card,frame-inversion; simple-audio-card,cpu { sound-dai = <&mcasp7>; }; btwilink_codec: simple-audio-card,codec { sound-dai = <&btwilink_sound>; }; }; }; &dra7_pmx_core { tps65917_pins_default: tps65917_pins_default { pinctrl-single,pins = < 0x424 (PIN_INPUT_PULLUP | MUX_MODE1) /* wakeup3.sys_nirq1 */ >; }; uart3_pins: pinmux_uart3_pins { pinctrl-single,pins = < 0x34c (PIN_INPUT_PULLUP | PIN_INPUT | MUX_MODE4) /* mcasp5_axr0.uart3_rxd */ 0x350 (PIN_OUTPUT | MUX_MODE4) /* mcasp5_axr1.uart3_txd */ >; }; uart5_pins: pinmux_uart5_pins { pinctrl-single,pins = < 0x1dc (PIN_INPUT_PULLUP | PIN_INPUT | MUX_MODE2) /* vout1_d0.uart5_rxd F11 */ 0x1e0 (PIN_OUTPUT | MUX_MODE2) /* vout1_d1.uart5_txd G10 */ >; }; uart6_pins: pinmux_uart6_pins { pinctrl-single,pins = < 0x1fc (PIN_INPUT_PULLUP | PIN_INPUT | MUX_MODE2) /* vout1_d8.uart6_rxd E8 */ 0x200 (PIN_OUTPUT | MUX_MODE2) /* vout1_d9.uart6_txd D9 */ >; }; uart10_pins: pinmux_uart10_pins { pinctrl-single,pins = < 0x170 (PIN_INPUT_PULLUP | PIN_INPUT | MUX_MODE8) /* vin2a_d2.uart10_rxd D1 */ 0x174 (PIN_OUTPUT | MUX_MODE8) /* vin2a_d3.uart10_txd E2 */ >; }; hdmi_i2c_sel_pin: pinmux_hdmi_i2c_sel_pin { pinctrl-single,pins = < /* this pin is used as a GPIO via mcasp */ 0x2fc (PIN_OUTPUT | MUX_MODE1) /* mcasp8_axr2 */ >; }; hdmi_i2c_pins_i2c: pinmux_hdmi_i2c_pins_default { pinctrl-single,pins = < 0x408 (PIN_INPUT | MUX_MODE0) /* i2c2_sda.i2c2_sda */ 0x40c (PIN_INPUT | MUX_MODE0) /* i2c2_scl.i2c2_scl */ >; }; hdmi_i2c_pins_ddc: pinmux_hdmi_i2c_pins_ddc { pinctrl-single,pins = < 0x408 (PIN_INPUT | MUX_MODE1) /* i2c2_sda.hdmi1_ddc_scl */ 0x40c (PIN_INPUT | MUX_MODE1) /* i2c2_scl.hdmi1_ddc_sda */ >; }; dcan1_pins_default: dcan1_pins_default { pinctrl-single,pins = < 0x3d0 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* dcan1_tx */ 0x418 (PULL_UP | MUX_MODE1) /* wakeup0.dcan1_rx */ >; }; dcan1_pins_sleep: dcan1_pins_sleep { pinctrl-single,pins = < 0x3d0 (MUX_MODE15 | PULL_UP) /* dcan1_tx.off */ 0x418 (MUX_MODE15 | PULL_UP) /* wakeup0.off */ >; }; mmc1_pins_default: pinmux_mmc1_default_pins { pinctrl-single,pins = < 0x354 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */ 0x358 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */ 0x35c (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */ 0x360 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */ 0x364 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */ 0x368 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */ 0x36c (PIN_INPUT | MUX_MODE14) /* mmc1sdcd.gpio187 */ >; }; mmc1_pins_sdr12: pinmux_mmc1_sdr12_pins { pinctrl-single,pins = < 0x354 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */ 0x358 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */ 0x35c (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */ 0x360 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */ 0x364 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */ 0x368 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */ >; }; mmc1_pins_hs: pinmux_mmc1_hs_pins { pinctrl-single,pins = < 0x354 (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_clk.clk */ 0x358 (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_cmd.cmd */ 0x35c (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_dat0.dat0 */ 0x360 (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_dat1.dat1 */ 0x364 (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_dat2.dat2 */ 0x368 (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_dat3.dat3 */ >; }; mmc1_pins_sdr25: pinmux_mmc1_sdr25_pins { pinctrl-single,pins = < 0x354 (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_clk.clk */ 0x358 (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_cmd.cmd */ 0x35c (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_dat0.dat0 */ 0x360 (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_dat1.dat1 */ 0x364 (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_dat2.dat2 */ 0x368 (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_dat3.dat3 */ >; }; mmc1_pins_ddr50: pinmux_mmc1_ddr50_pins { pinctrl-single,pins = < 0x354 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc1_clk.clk */ 0x358 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc1_cmd.cmd */ 0x35c (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc1_dat0.dat0 */ 0x360 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc1_dat1.dat1 */ 0x364 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc1_dat2.dat2 */ 0x368 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc1_dat3.dat3 */ >; }; mmc2_pins_default: mmc2_pins_default { pinctrl-single,pins = < 0x9c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a23.mmc2_clk */ 0xb0 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */ 0xa0 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */ 0xa4 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */ 0xa8 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */ 0xac (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */ 0x8c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */ 0x90 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */ 0x94 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */ 0x98 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */ >; }; mmc2_pins_hs: pinmux_mmc2_hs_pins { pinctrl-single,pins = < 0x9c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a23.mmc2_clk */ 0xb0 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */ 0xa0 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */ 0xa4 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */ 0xa8 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */ 0xac (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */ 0x8c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */ 0x90 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */ 0x94 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */ 0x98 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */ >; }; mmc2_pins_ddr_3_3v: pinmux_mmc2_ddr_3_3v_pins { pinctrl-single,pins = < 0x9c (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_a23.mmc2_clk */ 0xb0 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */ 0xa0 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */ 0xa4 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */ 0xa8 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */ 0xac (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */ 0x8c (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */ 0x90 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */ 0x94 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */ 0x98 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */ >; }; mmc4_pins_default: pinmux_mmc4_default_pins { pinctrl-single,pins = < UART1_CTSN (PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_ctsn.mmc4_clk E25 */ UART1_RTSN (PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_rtsn.mmc4_cmd C27 */ UART1_RXD (PIN_INPUT_PULLUP | MUX_MODE3) /* uart2_rxd.mmc4_dat0 D28 */ UART1_TXD (PIN_INPUT_PULLUP | MUX_MODE3) /* uart2_txd.mmc4_dat1 D26 */ UART2_CTSN (PIN_INPUT_PULLUP | MUX_MODE3) /* uart2_ctsn.mmc4_dat2 D27 */ UART2_RTSN (PIN_INPUT_PULLUP | MUX_MODE3) /* uart2_rtsn.mmc4_dat3 C28 */ >; }; }; &dra7_iodelay_core { mmc1_iodelay_ddr50_conf: mmc1_iodelay_ddr50_conf { pinctrl-single,pins = < 0x618 (A_DELAY(572) | G_DELAY(540)) /* CFG_MMC1_CLK_IN */ 0x624 (A_DELAY(0) | G_DELAY(600)) /* CFG_MMC1_CMD_IN */ 0x630 (A_DELAY(403) | G_DELAY(120)) /* CFG_MMC1_DAT0_IN */ 0x63c (A_DELAY(23) | G_DELAY(60)) /* CFG_MMC1_DAT1_IN */ 0x648 (A_DELAY(25) | G_DELAY(60)) /* CFG_MMC1_DAT2_IN */ 0x654 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT3_IN */ 0x620 (A_DELAY(1525) | G_DELAY(0)) /* CFG_MMC1_CLK_IN */ 0x628 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_CMD_OEN */ 0x62c (A_DELAY(55) | G_DELAY(0)) /* CFG_MMC1_CMD_OUT */ 0x634 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT0_OEN */ 0x638 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT0_OUT */ 0x640 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT1_OEN */ 0x644 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT1_OUT */ 0x64c (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT2_OEN */ 0x650 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT2_OUT */ 0x658 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT3_OEN */ 0x65c (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT3_OUT */ >; }; mmc2_iodelay_ddr_3_3v_conf: mmc2_iodelay_ddr_3_3v_conf { pinctrl-single,pins = < 0x18c (A_DELAY(0) | G_DELAY(120)) /* CFG_GPMC_A19_IN */ 0x1a4 (A_DELAY(265) | G_DELAY(360)) /* CFG_GPMC_A20_IN */ 0x1b0 (A_DELAY(0) | G_DELAY(120)) /* CFG_GPMC_A21_IN */ 0x1bc (A_DELAY(0) | G_DELAY(120)) /* CFG_GPMC_A22_IN */ 0x1c8 (A_DELAY(287) | G_DELAY(420)) /* CFG_GPMC_A23_IN */ 0x1d4 (A_DELAY(144) | G_DELAY(240)) /* CFG_GPMC_A24_IN */ 0x1e0 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A25_IN */ 0x1ec (A_DELAY(0) | G_DELAY(120)) /* CFG_GPMC_A26_IN */ 0x1f8 (A_DELAY(120) | G_DELAY(180)) /* CFG_GPMC_A27_IN */ 0x360 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_CS1_IN */ 0x190 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A19_OEN */ 0x194 (A_DELAY(174) | G_DELAY(0)) /* CFG_GPMC_A19_OUT */ 0x1a8 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A20_OEN */ 0x1ac (A_DELAY(168) | G_DELAY(0)) /* CFG_GPMC_A20_OUT */ 0x1b4 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A21_OEN */ 0x1b8 (A_DELAY(136) | G_DELAY(0)) /* CFG_GPMC_A21_OUT */ 0x1c0 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A22_OEN */ 0x1c4 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A22_OUT */ 0x1d0 (A_DELAY(879) | G_DELAY(0)) /* CFG_GPMC_A23_OUT */ 0x1d8 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A24_OEN */ 0x1dc (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A24_OUT */ 0x1e4 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A25_OEN */ 0x1e8 (A_DELAY(34) | G_DELAY(0)) /* CFG_GPMC_A25_OUT */ 0x1f0 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A26_OEN */ 0x1f4 (A_DELAY(120) | G_DELAY(0)) /* CFG_GPMC_A26_OUT */ 0x1fc (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A27_OEN */ 0x200 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A27_OUT */ 0x364 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_CS1_OEN */ 0x368 (A_DELAY(11) | G_DELAY(0)) /* CFG_GPMC_CS1_OUT */ >; }; }; &i2c1 { status = "okay"; clock-frequency = <400000>; tps65917: tps65917@58 { compatible = "ti,tps65917"; reg = <0x58>; pinctrl-names = "default"; pinctrl-0 = <&tps65917_pins_default>; interrupts-extended = <&gic GIC_SPI 2 IRQ_TYPE_NONE &dra7_pmx_core 0x424>; interrupt-parent = <&gic>; interrupt-controller; #interrupt-cells = <2>; ti,system-power-controller; tps65917_pmic { compatible = "ti,tps65917-pmic"; regulators { smps1_reg: smps1 { /* VDD_MPU */ regulator-name = "smps1"; regulator-min-microvolt = <850000>; regulator-max-microvolt = <1500000>; regulator-always-on; regulator-boot-on; }; smps2_reg: smps2 { /* VDD_CORE */ regulator-name = "smps2"; regulator-min-microvolt = <850000>; regulator-max-microvolt = <1500000>; regulator-boot-on; regulator-always-on; }; smps3_reg: smps3 { /* VDD_GPU IVA DSPEVE */ regulator-name = "smps3"; regulator-min-microvolt = <850000>; regulator-max-microvolt = <1500000>; regulator-boot-on; regulator-always-on; }; smps4_reg: smps4 { /* VDDS1V8 */ regulator-name = "smps4"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-always-on; regulator-boot-on; }; smps5_reg: smps5 { /* VDD_DDR */ regulator-name = "smps5"; regulator-min-microvolt = <1350000>; regulator-max-microvolt = <1350000>; regulator-boot-on; regulator-always-on; }; ldo1_reg: ldo1 { /* LDO1_OUT --> SDIO */ regulator-name = "ldo1"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <3300000>; regulator-always-on; regulator-boot-on; }; ldo2_reg: ldo2 { /* LDO2_OUT --> TP1017 (UNUSED) */ regulator-name = "ldo2"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <3300000>; }; ldo3_reg: ldo3 { /* VDDA_1V8_PHY */ regulator-name = "ldo3"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-boot-on; regulator-always-on; }; ldo5_reg: ldo5 { /* VDDA_1V8_PLL */ regulator-name = "ldo5"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-always-on; regulator-boot-on; }; ldo4_reg: ldo4 { /* VDDA_3V_USB: VDDA_USBHS33 */ regulator-name = "ldo4"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-boot-on; }; }; }; tps65917_power_button { compatible = "ti,palmas-pwrbutton"; interrupt-parent = <&tps65917>; interrupts = <1 IRQ_TYPE_NONE>; wakeup-source; ti,palmas-long-press-seconds = <6>; }; }; pcf_lcd: gpio@20 { compatible = "nxp,pcf8575"; reg = <0x20>; gpio-controller; #gpio-cells = <2>; }; pcf_gpio_21: gpio@21 { compatible = "nxp,pcf8575"; reg = <0x21>; lines-initial-states = <0x1408>; gpio-controller; #gpio-cells = <2>; interrupt-parent = <&gpio6>; interrupts = <11 IRQ_TYPE_EDGE_FALLING>; interrupt-controller; #interrupt-cells = <2>; }; /* tlv320aic3106: tlv320aic3106@18 { compatible = "ti,tlv320aic3106"; reg = <0x18>; adc-settle-ms = <40>; ai3x-micbias-vg = <1>; // 2.0V status = "okay"; // Regulators AVDD-supply = <&evm_3v3_sw>; IOVDD-supply = <&evm_3v3_sw>; DRVDD-supply = <&evm_3v3_sw>; DVDD-supply = <&aic_dvdd>; }; */ }; i2c_p3_exp: &i2c2 { status = "okay"; clock-frequency = <400000>; pcf_hdmi: gpio@26 { compatible = "nxp,pcf8575"; reg = <0x26>; lines-initial-states = <0xffeb>; gpio-controller; #gpio-cells = <2>; }; ov10633@37 { compatible = "ovti,ov10633"; reg = <0x37>; mux-gpios = <&pcf_hdmi 3 GPIO_ACTIVE_LOW>; /* CAM_FPD_MUX_S0 */ port { onboardLI: endpoint { remote-endpoint = <&vin1a>; hsync-active = <1>; vsync-active = <1>; pclk-sample = <0>; }; }; }; }; &i2c3 { status = "okay"; clock-frequency = <3400000>; }; &mcspi1 { status = "okay"; spidev@0 { compatible = "rohm,dh2228fv"; //compatible = "spidev"; spi-max-frequency = <24000000>; reg = <0>; }; }; &mcspi2 { status = "okay"; }; &uart1 { status = "okay"; interrupts-extended = <&gic GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH &dra7_pmx_core 0x3e0>; }; &uart2 { status = "okay"; }; /* * &uart3 { * status = "okay"; * gpios = <&pcf_gpio_21 14 GPIO_ACTIVE_LOW>; * }; */ &uart3 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&uart3_pins>; }; &uart5 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&uart5_pins>; }; &uart6 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&uart6_pins>; }; &uart10 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&uart10_pins>; }; &mmc1 { status = "okay"; pbias-supply = <&pbias_mmc_reg>; vmmc-supply = <&evm_3v3_sd>; vmmc_aux-supply = <&ldo1_reg>; bus-width = <4>; /* * SDCD signal is not being used here - using the fact that GPIO mode * is always hardwired. */ /* cd-gpios = <&gpio6 27 0>; */ ti,non-removable; pinctrl-names = "default", "hs", "sdr12", "sdr25", "ddr50"; pinctrl-0 = <&mmc1_pins_default>; pinctrl-1 = <&mmc1_pins_hs>; pinctrl-2 = <&mmc1_pins_sdr12>; pinctrl-3 = <&mmc1_pins_sdr25>; pinctrl-4 = <&mmc1_pins_ddr50 &mmc1_iodelay_ddr50_conf>; sd-uhs-ddr50; sd-uhs-sdr25; sd-uhs-sdr12; }; &mmc2 { status = "okay"; //vmmc-supply = <&evm_3v3_sw>; vmmc-supply = <&evm_3v3_sd>; bus-width = <8>; pinctrl-names = "default", "hs", "ddr_3_3v"; pinctrl-0 = <&mmc2_pins_default>; pinctrl-1 = <&mmc2_pins_hs>; pinctrl-2 = <&mmc2_pins_ddr_3_3v &mmc2_iodelay_ddr_3_3v_conf>; mmc-ddr-1_8v; }; &mmc4 { status = "okay"; vmmc-supply = <&evm_3v3_sd>; bus-width = <4>; cap-power-off-card; keep-power-in-suspend; ti,non-removable; pinctrl-names = "default"; pinctrl-0 = <&mmc4_pins_default>; }; /* &mmc4 { status = "okay"; vmmc-supply = <&vmmcwl_fixed>; bus-width = <4>; cap-power-off-card; keep-power-in-suspend; ti,non-removable; #address-cells = <1>; #size-cells = <0>; wlcore: wlcore@0 { compatible = "ti,wlcore"; reg = <2>; interrupt-parent = <&gpio5>; interrupts = <7 IRQ_TYPE_LEVEL_HIGH>; }; }; */ &cpu0 { cpu0-voltdm = <&voltdm_mpu>; voltage-tolerance = <1>; }; &voltdm_mpu { vdd-supply = <&smps1_reg>; }; &voltdm_dspeve { vdd-supply = <&smps3_reg>; }; &voltdm_gpu { vdd-supply = <&smps3_reg>; }; &voltdm_ivahd { vdd-supply = <&smps3_reg>; }; &voltdm_core { vdd-supply = <&smps2_reg>; }; &qspi { status = "okay"; spi-max-frequency = <48000000>; m25p80@0 { compatible = "s25fl256s1"; spi-max-frequency = <48000000>; reg = <0>; spi-tx-bus-width = <1>; spi-rx-bus-width = <4>; spi-cpol; spi-cpha; #address-cells = <1>; #size-cells = <1>; /* MTD partition table. * The ROM checks the first four physical blocks * for a valid file to boot and the flash here is * 64KiB block size. */ partition@0 { label = "QSPI.SPL"; reg = <0x00000000 0x000010000>; }; partition@1 { label = "QSPI.SPL.backup1"; reg = <0x00010000 0x00010000>; }; partition@2 { label = "QSPI.SPL.backup2"; reg = <0x00020000 0x00010000>; }; partition@3 { label = "QSPI.SPL.backup3"; reg = <0x00030000 0x00010000>; }; partition@4 { label = "QSPI.u-boot"; reg = <0x00040000 0x00100000>; }; partition@5 { label = "QSPI.u-boot-spl-os"; reg = <0x00140000 0x00080000>; }; partition@6 { label = "QSPI.u-boot-env"; reg = <0x001c0000 0x00010000>; }; partition@7 { label = "QSPI.u-boot-env.backup1"; reg = <0x001d0000 0x0010000>; }; partition@8 { label = "QSPI.kernel"; reg = <0x001e0000 0x0800000>; }; partition@9 { label = "QSPI.file-system"; reg = <0x009e0000 0x01620000>; }; }; }; /* &omap_dwc3_1 { extcon = <&extcon_usb1>; }; &omap_dwc3_2 { extcon = <&extcon_usb2>; }; */ &usb1 { dr_mode = "host"; }; &usb2 { dr_mode = "host"; }; &mac { status = "disabled"; }; /* &mac { status = "okay"; dual_emac; ti,no-idle; }; &cpsw_emac0 { phy_id = <&davinci_mdio>, <2>; phy-mode = "rgmii"; dual_emac_res_vlan = <1>; }; &cpsw_emac1 { phy_id = <&davinci_mdio>, <3>; phy-mode = "rgmii"; dual_emac_res_vlan = <2>; }; */ &elm { status = "okay"; }; &gpmc { status = "disabled"; ranges = <0 0 0 0x01000000>; /* minimum GPMC partition = 16MB */ nand@0,0 { reg = <0 0 4>; /* device IO registers */ ti,nand-ecc-opt = "bch8"; ti,elm-id = <&elm>; nand-bus-width = <16>; gpmc,device-width = <2>; gpmc,sync-clk-ps = <0>; gpmc,cs-on-ns = <0>; gpmc,cs-rd-off-ns = <80>; gpmc,cs-wr-off-ns = <80>; gpmc,adv-on-ns = <0>; gpmc,adv-rd-off-ns = <60>; gpmc,adv-wr-off-ns = <60>; gpmc,we-on-ns = <10>; gpmc,we-off-ns = <50>; gpmc,oe-on-ns = <4>; gpmc,oe-off-ns = <40>; gpmc,access-ns = <40>; gpmc,wr-access-ns = <80>; gpmc,rd-cycle-ns = <80>; gpmc,wr-cycle-ns = <80>; gpmc,bus-turnaround-ns = <0>; gpmc,cycle2cycle-delay-ns = <0>; gpmc,clk-activation-ns = <0>; gpmc,wait-monitoring-ns = <0>; gpmc,wr-data-mux-bus-ns = <0>; /* MTD partition table */ /* All SPL-* partitions are sized to minimal length * which can be independently programmable. For * NAND flash this is equal to size of erase-block */ #address-cells = <1>; #size-cells = <1>; partition@0 { label = "NAND.SPL"; reg = <0x00000000 0x000020000>; }; partition@1 { label = "NAND.SPL.backup1"; reg = <0x00020000 0x00020000>; }; partition@2 { label = "NAND.SPL.backup2"; reg = <0x00040000 0x00020000>; }; partition@3 { label = "NAND.SPL.backup3"; reg = <0x00060000 0x00020000>; }; partition@4 { label = "NAND.u-boot-spl-os"; reg = <0x00080000 0x00040000>; }; partition@5 { label = "NAND.u-boot"; reg = <0x000c0000 0x00100000>; }; partition@6 { label = "NAND.u-boot-env"; reg = <0x001c0000 0x00020000>; }; partition@7 { label = "NAND.u-boot-env.backup1"; reg = <0x001e0000 0x00020000>; }; partition@8 { label = "NAND.kernel"; reg = <0x00200000 0x00800000>; }; partition@9 { label = "NAND.file-system"; reg = <0x00a00000 0x0f600000>; }; }; }; &gpio7 { ti,no-reset-on-init; ti,no-idle-on-init; }; &dss { status = "ok"; vdda_video-supply = <&ldo5_reg>; }; &hdmi { status = "ok"; vdda-supply = <&ldo3_reg>; port { hdmi_out: endpoint { remote-endpoint = <&tpd12s015_in>; }; }; }; &dcan1 { status = "ok"; pinctrl-names = "default", "sleep"; pinctrl-0 = <&dcan1_pins_default>; pinctrl-1 = <&dcan1_pins_sleep>; }; &mailbox5 { status = "okay"; mbox_ipu1_legacy: mbox_ipu1_legacy { status = "okay"; }; mbox_dsp1_legacy: mbox_dsp1_legacy { status = "okay"; }; }; &mailbox6 { status = "okay"; mbox_ipu2_legacy: mbox_ipu2_legacy { status = "okay"; }; mbox_dsp2_legacy: mbox_dsp2_legacy { status = "okay"; }; }; &mmu0_dsp1 { status = "okay"; }; &mmu1_dsp1 { status = "okay"; }; &mmu_ipu1 { status = "okay"; }; &mmu_ipu2 { status = "okay"; }; &ipu2 { status = "okay"; memory-region = <&ipu2_cma_pool>; mboxes = <&mailbox6 &mbox_ipu2_legacy>; timers = <&timer3>; watchdog-timers = <&timer4>, <&timer9>; }; &ipu1 { status = "okay"; memory-region = <&ipu1_cma_pool>; mboxes = <&mailbox5 &mbox_ipu1_legacy>; timers = <&timer11>; watchdog-timers = <&timer7>, <&timer8>; }; &dsp1 { status = "okay"; memory-region = <&dsp1_cma_pool>; mboxes = <&mailbox5 &mbox_dsp1_legacy>; timers = <&timer5>; watchdog-timers = <&timer10>; }; &atl { status = "okay"; atl2 { bws = <DRA7_ATL_WS_MCASP2_FSX>; aws = <DRA7_ATL_WS_MCASP3_FSX>; }; }; &mcasp3 { fck_parent = "atl_clkin2_ck"; status = "okay"; op-mode = <0>; /* MCASP_IIS_MODE */ tdm-slots = <2>; /* 4 serializer */ serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ 1 2 0 0 >; tx-num-evt = <8>; rx-num-evt = <8>; }; &mcasp7 { #sound-dai-cells = <0>; status = "okay"; op-mode = <0>; /* MCASP_IIS_MODE */ tdm-slots = <4>; /* 4 serializer */ serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ 2 1 0 0 >; tx-num-evt = <8>; rx-num-evt = <8>; }; &mcasp8 { /* not used for audio. only the AXR2 pin is used as GPIO */ status = "okay"; }; &usb2_phy1 { phy-supply = <&ldo4_reg>; }; &usb2_phy2 { phy-supply = <&ldo4_reg>; }; &vip1 { status = "okay"; }; video_in: &vin1a { status = "okay"; endpoint@0 { slave-mode; remote-endpoint = <&onboardLI>; }; }; #include "dra7xx-jamr3.dtsi" &tvp_5158{ mux-gpios = <&pcf_hdmi 3 GPIO_ACTIVE_HIGH>, /*CAM_FPD_MUX_S0*/ <&pcf_jamr3_21 8 GPIO_ACTIVE_LOW>; /*SEL_TVP_FPD*/ };
Hi Andy,
Did you manage to solve the problem?
I recall another question to ask. Do you have a 3.3V to 5V voltage translator on the PCB? It's because SoC pins are 3.3-V , and HDMI needs 5 V.
Regards,
Stan