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OMAPL138 Syslink printing from shared memory not showing data

I'm using Syslink 2_21_03_11 example 4 SharedRegion as my starting point.

The example passes a string from the ARM to the DSP and capitalizes it on the DSP side and notifies the ARM that the operation was complete.

I replaced that string with an array of structs which contain additional arrays, all static, and I am sending a pointer address to that struct object from the ARM to the DSP.

Out of the 20 values being stored inside the struct and being written/read on both sides, one array seems to have a problem of not displaying its first block.

Lets say I have this array a[4] which is inside a struct s[32]. 

s[0].a[1 to 4] is showing up as all 0's on the ARM side, but the values are hidden they are not actually 0, because the transpose of that same array is taken and the output is on s[0].b and the output is correct. Additionally the rest of s[1-31].a[1-4] is showing up correctly, just the first s[0].a[1-4] is not.

Also, if I run the ARM side of the program again, right after the previous run, it will print out all values correctly.

There is some bizarre problem going on and its not very important for me to see those values as I only care about the values being correct themselves. But I'm wondering if anyone has encountered a problem like this and have any clues to what it might be.

  • We are working with factory team on the above question.

  • Usman,

    This appears to be a cache coherency issue. Please refer to the section of for cache coherency in this article. The wiki refers to codec engine software but that concept applies to syslink as well.

    processors.wiki.ti.com/.../Codec_Engine_Application_Developers_Guide

    Can you try Cache invalidating the smaller structure on the ARM before reading it on the ARM to see if correct contents are being read.

    Regards,
    Rahul
  • I am running

    Cache_inv((uint32_t *)0x80000000, 0x00020000, 0x2 ,1);

    and it is still producing the same output

    My memory map looks like this

    var SR_0 = {
            name: "SR_0", space: "data", access: "RWX",
            base: 0xC2000000, len: 0x10000,
            comment: "SR#0 Memory (64 KB)"
        };
    
    var SR_1 = {
            name: "SR_1", space: "data", access: "RWX",
            base: 0xC2010000, len: 0xFF0000,
            comment: "SR#1 Memory (15 MB)"
        };
    
    Build.platformTable["ti.platforms.evmOMAPL138:dsp"] = {
        externalMemoryMap: [
            [ SR_0.name, SR_0 ],
            [ SR_1.name, SR_1 ],
            [ "DSP_PROG", {
                name: "DSP_PROG", space: "code/data", access: "RWX",
                base: 0xC3000000, len: 0x800000,
                comment: "DSP Program Memory (8 MB)"
            }]
        ],
        codeMemory:  "DSP_PROG",
        dataMemory:  "DSP_PROG",
        stackMemory: "DSP_PROG",
        l1DMode: "32k",
        l1PMode: "32k",
        l2Mode: "32k"
    };

  • Edit: I was using the wrong values, I changed it to
    Cache_inv((uint32_t *)0x11808000, 0x00007FFF, 0x2 ,1);
    and it shows up correctly on the first run now.