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Memory Error / Properly Addressing RAM on C5515

I recently got my TMS320C5515 eZdsp USB Stick and was working with setting up a delay buffer as a basic test of its capabilities. I do this with an Int16 array. I was noticing that the size of the array maxed out the chip's memory much quicker than it should have. When the array size up gets past 24000 (which translates to 1/2 second delay at a sample rate of 48kHz) I started getting the following build error, which I think is due to insufficient memory space:

gmake: *** [main.obj] Error 1 

gmake: Target 'all' not remade because of errors. 

This seems strange since the chip has 320K bytes of RAM. 48k samples at 16bits (2 bytes) per sample is 96k bytes, which is significantly below the amount of RAM on the chip. 

Does anyone know what could be causing this? Is there something I need to do to ensure that the chips memory is properly configured (perhaps with SARAM vs DARAM), or perhaps something else in my program that might be taking up all my extra memory?

I declare my delay line like this:

Uint16 delayCounter = 0;
Int16 delay[36000];

My test project is based on the aic3204 audio I/O example I got on the Spectrum Digital Site: http://support.spectrumdigital.com/boards/usbstk5515_v2/reva/

  • Emmett,

    The device does have 320k of RAM but this is a combination of SARAM and DARAM. Could you please try to reduce the size of your array to say 4000 and attach the map file along with the .cmd file to this thread?

    The reason being that the memory allocation might need to be adjusted in your cmd file to ensure your array lands in an area that has sufficient space (which in this case is obviously not).

    Lali
  • https://e2e.ti.com/cfs-file/__key/communityserver-discussions-components-files/791/audioTests.7z

    Here is my project. I reduced the array size to 24000, at which the project compiles fine. 

    Here is the memory portion of my cmd file:

    MEMORY
    {
    PAGE 0: /* ---- Unified Program/Data Address Space ---- */

    MMR (RWIX): origin = 0x000000, length = 0x0000c0 /* MMRs */
    DARAM0 (RWIX): origin = 0x0000c0, length = 0x00ff40 /* 64KB - MMRs */
    SARAM0 (RWIX): origin = 0x010000, length = 0x010000 /* 64KB */
    SARAM1 (RWIX): origin = 0x020000, length = 0x020000 /* 128KB */
    SARAM2 (RWIX): origin = 0x040000, length = 0x00FE00 /* 64KB */
    VECS (RWIX): origin = 0x04FE00, length = 0x000200 /* 512B */
    PDROM (RIX): origin = 0xff8000, length = 0x008000 /* 32KB */

    PAGE 2: /* -------- 64K-word I/O Address Space -------- */

    IOPORT (RWI) : origin = 0x000000, length = 0x020000
    }

    It seems like from this that SARAM is being divided up into 3 sections, which might be causing the issue. Does SARAM need to be divided like this? 

    Also, how do I control where a variable is being stored? Is that something I would do when I initialize it? 

  • Have you gotten the chance to take a look at the files I sent? Still needing an answer to this issue. Thanks!
  • Hi Emmett,

    You can use the .cmd file along with a #pragma in the C code to force the variable to reside in a certain memory region. See the example below.
    In the .CMD file, you may split apart the memory sections like DARAM_0 to DARAM_7, or you may combine memory sections like SARAM in the example below for the vector variableName

    Then you can look inside the map file (generated file located in Debug/projectName.map), and search for the variableSection. It should appear in the memory section you assign it to. And you can figure out how much space is left in the assigned section.

    One gotcha, is that the bootloader uses SARAM31, so any code or constants stored into this section will be corrupted by the bootloader. However, after the bootloader is completed and your program is running, you may allocate variables in SARAM31 without issue.


    Refer to the TMS320C55x Optimizing C/C++ Compiler v 4.4User's Guide (spru281g.pdf)
    5.9.6 The DATA_SECTION Pragma
    6.1.4 Sections

    =-=-=-=-=-=-=-=-=-=-=-
    (inside of .c file where variables are declared)


    #pragma DATA_SECTION(variableName, "VariableSection");
    Int16 variableName[VARIABLE_SIZE]={0};

    =-=-=-=-=-=-=-=-=-=-=-
    (inside of .CMD file)
    (you may split apart the memory sections, like DARAM_0 to DARAM_7 or you may combine memory sections like SARAM)

    MEMORY
    {
    MMR (RW) : origin = 0000000h length = 0000c0h /* MMRs */

    DARAM_0 (RW) : origin = 00000c0h length = 001f40h /* on-chip DARAM 0 */
    DARAM_1 (RW) : origin = 0002000h length = 002000h /* on-chip DARAM 1 */
    DARAM_2 (RW) : origin = 0004000h length = 002000h /* on-chip DARAM 2 */
    DARAM_3 (RW) : origin = 0006000h length = 002000h /* on-chip DARAM 3 */
    DARAM_4 (RW) : origin = 0008000h length = 002000h /* on-chip DARAM 4 */
    DARAM_5 (RW) : origin = 000a000h length = 002000h /* on-chip DARAM 5 */
    DARAM_6 (RW) : origin = 000c000h length = 002000h /* on-chip DARAM 6 */
    DARAM_7 (RW) : origin = 000e000h length = 002000h /* on-chip DARAM 7 */

    SARAM (RW) : origin = 0010000h length = 040000h /* on-chip SARAM */

    SAROM_0 (RX) : origin = 0fe0000h length = 008000h /* on-chip ROM 0 */
    SAROM_1 (RX) : origin = 0fe8000h length = 008000h /* on-chip ROM 1 */
    SAROM_2 (RX) : origin = 0ff0000h length = 008000h /* on-chip ROM 2 */
    SAROM_3 (RX) : origin = 0ff8000h length = 007f00h /* on-chip ROM 3 */
    VECS (RX) : origin = 0ffff00h length = 000100h /* on-chip ROM vectors */

    EMIF_CS0 (RW) : origin = 0050000h length = 07B0000h /* mSDR */
    EMIF_CS2 (RW) : origin = 0800000h length = 0400000h /* ASYNC1 : NAND */
    EMIF_CS3 (RW) : origin = 0C00000h length = 0200000h /* ASYNC2 : NAND */
    EMIF_CS4 (RW) : origin = 0E00000h length = 0100000h /* ASYNC3 : NOR */
    EMIF_CS5 (RW) : origin = 0F00000h length = 00E0000h /* ASYNC4 : SRAM */
    }


    SECTIONS
    {
    vectors (NOLOAD)
    .bss : > SARAM /*, fill = 0 */
    .stack : > DARAM_0
    .sysstack : > DARAM_0
    .text : > SARAM ALIGN = 4
    .cinit : > SARAM
    vector : > DARAM_0 ALIGN = 256

    VariableSection : > SARAM

    .emif_cs0 : > EMIF_CS0
    .emif_cs2 : > EMIF_CS2
    .emif_cs3 : > EMIF_CS3
    .emif_cs4 : > EMIF_CS4
    .emif_cs5 : > EMIF_CS5
    }

    Hope this helps,
    Mark