BCH4/8 support with omap3 ?

Hi Ran,

As you found there is a workaround published at:
e2e.ti.com/.../349230

BR
Tsvetolin Shulev

Hello Tsvetolin ,

Thank you.
I hope you can assist on this.
We use nand ecc hw for both linux and u-boot,
On the first reset linux is boot OK, without any errors.
We can read/write files to flash, and there is no error.

But on the second and later boot it starts showing ecc error printing.
mtd->read(0x110 bytes from 0x434ef0) returned ECC error

Why there is no ecc error in the first reset ?
I can read write environment, so doesn't it mean that ecc layout in kernel/uboot is correct ?

Thanks,
Ran

Hi Tsvetolin ,

Wwe are still struglling on the ecc nightmare.

We are trying to run bch4 or bch8 with omap3530.

1. We moved to latest head of nand in both u-boot and linux arago git.

2. With sw ecc, everything seems to work OK.

3. But since we are using nand with 4-bit, we have strong fears that it is not enough, (Right?)

4. We therefore try to use bch4 and bch8 instead.

  But both fail:

 4.1   bch4 fails as following:

[    4.781524]      host=omap, domain=, nis-domain=(none),

[    4.787048]      bootserver=150.42.40.220, rootserver=150.42.40.220, rootpath=

[    4.854156] BCH decoding failed

[    4.884979] BCH decoding failed

[    4.915740] BCH decoding failed

.....

4.2 bch8 fails as following:

[    4.778137] Unable to handle kernel NULL pointer dereference at virtual address 00000400

....

[    5.218017] [<c004c594>] (elm_load_syndrome+0x54/0x64) from [<c058f7e8>] (lock_classes+0x2600/0x25fed0)

[    5.227813] Code: e1570004 e1833000 e28cc004 e1833c01 (e4853004)

[    5.234375] ---[ end trace fbe6902aca3ab727 ]---

[    5.239471] Kernel panic - not syncing: Attempted to kill init!

[    5.245697] [<c0045398>] (unwind_backtrace+0x0/0xf8) from [<c02c58f0>] (panic+0x74/0x1a4)

[    5.254333] [<c02c58f0>] (panic+0x74/0x1a4) from [<c0070064>] (do_exit+0x5d4/0x6d0)

[    5.262390] [<c0070064>] (do_exit+0x5d4/0x6d0) from [<c00437fc>] (die+0x2e4/0x300)

[    5.270355] [<c00437fc>] (die+0x2e4/0x300) from [<c0046374>] (__do_kernel_fault+0x74/0x84)

[    5.279052] [<c0046374>] (__do_kernel_fault+0x74/0x84) from [<c02cb6b0>] (do_page_fault+0x78/0x29c)

[    5.288574] [<c02cb6b0>] (do_page_fault+0x78/0x29c) from [<c00342cc>] (do_DataAbort+0x34/0x98)

[    5.297607] [<c00342cc>] (do_DataAbort+0x34/0x98) from [<c02c992c>] (__dabt_svc+0x4c/0x60)

[    5.306304] Exception stack(0xcd02bab8 to 0xcd02bb00)

[    5.311614] baa0:                                                       00000002 000000ee

[    5.320190] bac0: 00000004 ee4d0402 00000004 00000400 cd02bb14 0000000d cd2ac240 cd02bb78

[    5.328765] bae0: 000001ff cd2ac000 cd02bb18 cd02bb00 c004c6fc c004c594 20000013 ffffffff

[    5.337371] [<c02c992c>] (__dabt_svc+0x4c/0x60) from [<c004c594>] (elm_load_syndrome+0x54/0x64)

[    5.346496] [<c004c594>] (elm_load_syndrome+0x54/0x64) from [<c058f7e8>] (lock_classes+0x2600/0x25fed0)

- Is there any version for omap3 which support bch4 or bch8 ?

- Why do I see the "elm" print, isn't elm only supported with ti81xx ?

Regards,

Ran

Ran,

I suggest you to use software ECC. This is the most recommended workaround when using OMAP 35xx processors.
You can find data about software ECC correction algorithm performance at:
processors.wiki.ti.com/.../Raw_NAND_ECC
There is no OMAP 35xx which has correct BCH4 or BCH8 support.
The listed above crash log needs deep investigation.

BR
Tsvetolin Shulev

Hi Tsvetolin ,

Thank you very much for the response. It is very much appreciated.

Maybe this explains why I can't make 4-bch work....

I wander if there are others who faced similar cases with omap35 and are using nand 4-bit .

Please tell me, if we have 4-bit nand, doesn't it mean that we must use at least 4-bit correction code ?


1. Do we need to implemenet 4bch in software ?
2. Maybe we can use on-die ecc as advised by micron's ?
www.micron.com/.../tn2956_ondie_ecc_omap3_linux.pdf
though, I am not sure that the same feature (on-die ecc) is also supported with our chip:
MS29C4G48MAZAKC1-XX_rev4-MSC_029.pdf

Best Regards,
Ran

Hi Tsvetolin ,

Thank you again.

I would like to ask please, when you said:

"There is no OMAP 35xx which has correct BCH4 or BCH8 support."

Isn't BCH4/BCH8 implementation in latest head of omap3 arago git, means that it is supported in any omap3 chip ?

 

If not - does it mean that there are some omap3 chips which supports it and others are not ?

 

Isn't BCH4/BCH8 it a software implementation - independent in chip hardware ?

Thank you,

Ran