OMAP3530 NAND Timing GNF12

Can any TI member answer my question? it's very urgent!

First of all: For what purpose would you like to calculate the GNF12 timing? You don't need to program it anywhere AFAIR - To me it's just kind of an intermediate parameter for describing figure 6-15 in the data manual in full detail.

Looking at the figure the GNF12 parameter is related to the NAND read cycle. It must therefore be related to RDACCESSTIME from the TRM...

Best regards - Good luck
  Søren

Søren

Thanks your help very much!

What I am doing is checking the data setup time during CPU reading from NAND flash.

In my opinion, GNF12 is requirement of  data setup time during reading. Before GNF12 expired, data from NAND flash must  finish setup; After GNF12 expired, CPU will sample the input data internally. So I have to guarantee the data from NAND flash is fully settled before GNF12 expired, otherwise CPU might capture wrong data, am I right? So I need to know the exact time of GNF12.

And regarding to RDACCESSTIME, after I checked the TRM SPRUF98D-page1276, I think this parameter defined the CPU's maximal required data hold time from NAND flash.

I don't know whether my understanding is right or wrong, please let me know if you have any different idea, thanks a lot!

For TI members, please don't hesitate to point out if I have any misunderstanding, thanks!

You are welcome,

I think we agree. The only thing I tried to say was that you can't program GNF12 in any register in the OMAP. Only the RDACCESSTIME value (which correspond to GNF12 I agree).

What I normally do is using the wait-pin on the NAND device and the wait signaling mechanism. That way you don't need to care about doing detailed calculations. Secondly hooking a logic analyzer to the pins (in case accessible) and stepping through a simple read/write loop is normally much easier for final timing determination that doing all calculations. It might be that it isn’t so "scientific" but it by far easier I think :-)

I do unfortunately not have access to SPRUF98D (only version C and G) and neither of these seems to indicate anything related to NAND access around page 1276. Both documents have this page in the SDRC area. Are you sure you gave the proper page? Can you i.e. give the figure/table number and caption as well?

AFAIR RDACCESSTIME is a fixed value where the OMAP start reading data in synchronous mode and not any kind of maximum value...

Good luck - I hope this helps as well
  Søren

Hi Søren

I understand that GNF12 is not programable, but as I mentioned, for the timing calculation, it's necessary.

For RDACCESSTIME, you can find it's detail contents  in page1119 of SPRUF98G, "11.1.5.14.1.5 NAND Device Data Read and Write Phase Control in Stream Mode".

And one more question: Do you know when data is latched into CPU reading from NAND?  If I can find this value, then GNF12 might be not necessary anymore.

AFAIR the OMAP3 latches the first data after RDACCESSTIME clock cycles from the beginning of the cycle start (see as well table 11-57 of the TRM). 
  Søren

Soren

Thanks your information very much! I will use this timing for calculation.