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C66x DSP PCIe

ikon
Genius 5355 points

Hi Support,

Would like to find out on the followings as currently need to design PCIe interface between TI C66 DSP processors.

1. How to interconnect the 2 lanes PCIe between x2 C66 (within a card / card to card)? Any reference design? How to configure which C66 is root complex or end point?
2. For software side, what do we need to configure for the C66 (RC and EP)?
3. Any other things need to take care when design this PCIe interface between C66?

Thanks.

  • 0
    TI__Guru** 116100 points
    I presume that you are having C6678 EVM board or DSP processor.
    We have PCIe example which can run as RC or EP by configuring the "PcieModeGbl" variable in code.
    C:\ti\pdk_c667x_2_0_2\packages\MyExampleProjects\PCIE_evmc6678_wSoCFile_C66BiosExampleProject

    C:\ti\pdk_c667x_2_0_2\packages\ti\drv\pcie\example\sample\src\pcie_sample.c

    Latest processor SDK package does support EDMA transfer between RC and EP.

    In C6678, PCIe lane is connected to AMC connector.

    Please refer to the following TI guides.
    www.ti.com/.../sprugs6d.pdf
    processors.wiki.ti.com/.../PCI_Express_(PCIe)_Resource_Wiki_for_Keystone_Devices
    www.ti.com/.../sprabi2c.pdf (refer page 69)
  • 0
    Guru 13202 points
    If you have couple of boards already and think about their interconnection, then just connect appropriate diffpairs properly. If you are designing custom board, then again make sure to route Tx diffpairs of one SoC towards Rx of another and vice versa. If you plan to have more than two chips on PCIe, then you'll have to put PCIe switch. If former cases who is RC and who is EP is defined by software and their roles can be interchanged. In the latter case with switches it may get more complicated, as upstream port towards RC might be dedicated one.
    One may use TI's examples as a starting point. If one will work with TI devices only, those references might work with very few modifications. They do provide both RC and EP initialization without enumeration.