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Tuning memory layout

Hello everyone!

I got my DSP application work but I stumble upon unexpected low performance. I suspect my memory layout is far from optimal. Now it looks like this

MEMORY
{ DSPL2ROM o = 0x00700000 l = 0x00100000 /* 1MB L2 Internal ROM */ DSPL2RAM o = 0x00800000 l = 0x00040000 /* 256kB L2 Internal RAM */ DSPL1PRAM o = 0x00E00000 l = 0x00008000 /* 32kB L1 Internal Program RAM */ DSPL1DRAM o = 0x00F00000 l = 0x00008000 /* 32kB L1 Internal Data RAM */ SHDSPL2ROM o = 0x11700000 l = 0x00100000 /* 1MB L2 Shared Internal ROM */ SHDSPL2RAM o = 0x11800000 l = 0x00040000 /* 256kB L2 Shared Internal RAM */ SHDSPL1PRAM o = 0x11E00000 l = 0x00008000 /* 32kB L1 Shared Internal Program RAM */ SHDSPL1DRAM o = 0x11F00000 l = 0x00008000 /* 32kB L1 Shared Internal Data RAM */ SHRAM o = 0x80000000 l = 0x00020000 /* 128kB Shared RAM */ EMIFBSDRAM o = 0xC0000000 l = 0x10000000 /* 256MB SDRAM Data */ } SECTIONS { .text > DSPL2RAM .stack > DSPL2RAM .bss > DSPL2RAM .cio > EMIFBSDRAM .const > EMIFBSDRAM .data > EMIFBSDRAM .switch > EMIFBSDRAM .sysmem > EMIFBSDRAM .far > SHDSPL2RAM .args > SHRAM .ppinfo > SHRAM .ppdata > SHRAM /* COFF sections */ .pinit > EMIFBSDRAM .cinit > EMIFBSDRAM /* EABI sections */ .binit > SHRAM .init_array > SHRAM .neardata > SHRAM .fardata > SHRAM .rodata > SHRAM .c6xabi.exidx > SHRAM .c6xabi.extab > SHRAM .cio > SHRAM /* C I/O Buffer */ .vecs > SHRAM /* Interrupt Vectors */ }

To be honest I don't even know what a half of sections is for (.ppinfo, .args, .switch and so on).
Would it be better to place code and data on different memory devices (SHRAM vs DSPL2RAM)?
Speaking generally I have a lot of questions. Are there any manuals about tuning memory layout? Which document I should read first?

Thanks.