Hi All,
I am facing few problems on DM6467 EMIF data transfer. The problem details are explained below.
I am doing data read/write operations on DM6467 EMIF bus. Transferring data over EMIF from 2 devices and facing few problems. Below is my setup and the observations,
1. I have a custom board using DM6467 and we have NAND and FPGA connected over EMIF.
2. My test setup is as follows
a. First test setup – NAND read/write over EMIF through CPU. FPGA read/write over EMIF through EDMA.
b. Second test setup – NAND read/write over EMIF through CPU. FPGA read/write over EMIF through CPU.
Observations in First test setup(NAND – through CPU, FPGA – through EDMA):
1. The independent NAND and FPGA read/writes are happening fine. That is at any instance i do only NAND read or NAND write or FPGA read or FPGA write.
2. I also tried NAND write and FPGA write in parallel which are happening fine. Also NAND write and FPGA read in parallel are happening fine.
3. Issue: NAND read and FPGA read in parallel or NAND read and FPGA write in parallel is giving data corruption problems. The problem is only in NAND read – It always gives ECC and CRC error. Whereas FPGA read/write which is happening in parallel with NAND are fine.
Independent operations |
Read |
Write |
NAND (CPU) |
Pass |
Pass |
FPGA (EDMA) |
Pass |
Pass |
Combined operations |
NAND write and FPGA write |
NAND Write and FPGA read |
NAND read and FPFA write |
NAND read and FPFA read |
NAND (CPU) and FPGA (EDMA) |
Pass |
Pass |
NAND data corruption(ECC and CRC error) |
NAND data corruption(ECC and CRC error) |
Observations in Second test setup(NAND – read/write through CPU, FPGA – read/write through CPU):
1. Here all the transfers even when executed in parallel are happening fine.
Can you please throw some light on the data corruption behavior which is happening with NAND read when FPGA uses EDMA to transfer data.?
Thank you,
Santosh