Interrupt Vector Table management with TI-RTOS and custom Bootloader - MSP430FR5969

Antoine Bodiguel

Other Parts Discussed in Thread: MSP430FR5969, SYSBIOS

Hello everyone,

I'm asking for a little bit of help with our current project please. Let me explain the situation first :

So, we created a custom Bootloader to flash an application on the MSP430FR5969.

To test the Bootloader, we used a small program with a simple blink_led and a relocated Interrupt Vector Table (IVT). In order to do so, we used the MSP430 functionnality that translates the IVT at the end of RAM thanks to the SYSRIVECT bit. That way, we have an IVT for the bootloader (located : 0xFF80 - 0xFFFF) and an IVT for the blink_led app (located : 0x2380 - 0x23FF).

Until now, it works well : we are able to upload the blink_led and, depending on the SYSRIVECT bit state, we can use interrupts form the normal IVT or from the RAM IVT.

Here comes the tricky part that concerns TI-RTOS. The application we want to flash uses interrupts that are managed by the TI-RTOS :

The idea is to do the same for this application and the blink_led, which is using the RAM IVT and not the normal IVT. But the current application seems to use the normal IVT through the SYS/BIOS.

I read some posts and wiki, and I understand that we don't need to go with the SYS/BIOS to use the interrupts :

processors.wiki.ti.com/.../BIOS_for_the_MSP430

I also came across this topic (https://e2e.ti.com/support/embedded/tirtos/f/355/t/462437), but his problem is quite different from ours.

So basically, I am wondering how I can use the RAM IVT as the entry for the interrupts from the application even so it's currently managed by the TI-RTOS.

Should I redo the code and create the ISR functions for each one, so that I can use them in the RAM IVT ? Then, I suppose I have to remove them from the SYS/BIOS config ? Or is there an easier way ?

I am a total newbie concerning TI-RTOS, so I don't want to brick the application by trying things here and there.

If you have any idea, or if you already came across that kind of situation, I'm all ears :)

Thanks a lot

over 9 years ago

0 Gilbert Rodriguez III over 9 years ago

TI__Intellectual 2275 points

Hi Antoine,

Can you let me know what version of TIRTOS you are using? Can you also attach your linker.cmd file?

Regards,
Gilbert

0 Antoine Bodiguel over 9 years ago in reply to Gilbert Rodriguez III

Prodigy 40 points

Hi Gilbert,

It's the 2.10.01.38 version of TI-RTOS.

And here is the .cmd file :

/* ============================================================================ */
/* Copyright (c) 2014, Texas Instruments Incorporated                           */
/*  All rights reserved.                                                        */
/*                                                                              */
/*  Redistribution and use in source and binary forms, with or without          */
/*  modification, are permitted provided that the following conditions          */
/*  are met:                                                                    */
/*                                                                              */
/*  *  Redistributions of source code must retain the above copyright           */
/*     notice, this list of conditions and the following disclaimer.            */
/*                                                                              */
/*  *  Redistributions in binary form must reproduce the above copyright        */
/*     notice, this list of conditions and the following disclaimer in the      */
/*     documentation and/or other materials provided with the distribution.     */
/*                                                                              */
/*  *  Neither the name of Texas Instruments Incorporated nor the names of      */
/*     its contributors may be used to endorse or promote products derived      */
/*     from this software without specific prior written permission.            */
/*                                                                              */
/*  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */
/*  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,       */
/*  THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR      */
/*  PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR            */
/*  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,       */
/*  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,         */
/*  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */
/*  OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,    */
/*  WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR     */
/*  OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,              */
/*  EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.                          */
/* ============================================================================ */

/******************************************************************************/
/* lnk_msp430fr5969.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR5969 PROGRAMS     */
/*                                                                            */
/*   Usage:  lnk430 <obj files...>    -o <out file> -m <map file> lnk.cmd     */
/*           cl430  <src files...> -z -o <out file> -m <map file> lnk.cmd     */
/*                                                                            */
/*----------------------------------------------------------------------------*/
/* These linker options are for command line linking only.  For IDE linking,  */
/* you should set your linker options in Project Properties                   */
/* -c                                               LINK USING C CONVENTIONS  */
/* -stack  0x0100                                   SOFTWARE STACK SIZE       */
/* -heap   0x0100                                   HEAP AREA SIZE            */
/*                                                                            */
/*----------------------------------------------------------------------------*/


/****************************************************************************/
/* SPECIFY THE SYSTEM MEMORY MAP                                            */
/****************************************************************************/

MEMORY
{
    SFR                     : origin = 0x0000, length = 0x0010
    PERIPHERALS_8BIT        : origin = 0x0010, length = 0x00F0
    PERIPHERALS_16BIT       : origin = 0x0100, length = 0x0100
    RAM                     : origin = 0x1C00, length = 0x0780//0x0800			//ABO : reserved 80 bytes for new IVT in RAM
    INFOA                   : origin = 0x1980, length = 0x0080
    INFOB                   : origin = 0x1900, length = 0x0080
    INFOC                   : origin = 0x1880, length = 0x0080
    INFOD                   : origin = 0x1800, length = 0x0080
    FRAM                    : origin = 0x4400, length = 0xBB80
    FRAM2                   : origin = 0x10000,length = 0x4000
    SIGNATURE               : origin = 0xFF80, length = 0x0010
    INT00                   : origin = 0xFF90, length = 0x0002
    INT01                   : origin = 0xFF92, length = 0x0002
    INT02                   : origin = 0xFF94, length = 0x0002
    INT03                   : origin = 0xFF96, length = 0x0002
    INT04                   : origin = 0xFF98, length = 0x0002
    INT05                   : origin = 0xFF9A, length = 0x0002
    INT06                   : origin = 0xFF9C, length = 0x0002
    INT07                   : origin = 0xFF9E, length = 0x0002
    INT08                   : origin = 0xFFA0, length = 0x0002
    INT09                   : origin = 0xFFA2, length = 0x0002
    INT10                   : origin = 0xFFA4, length = 0x0002
    INT11                   : origin = 0xFFA6, length = 0x0002
    INT12                   : origin = 0xFFA8, length = 0x0002
    INT13                   : origin = 0xFFAA, length = 0x0002
    INT14                   : origin = 0xFFAC, length = 0x0002
    INT15                   : origin = 0xFFAE, length = 0x0002
    INT16                   : origin = 0xFFB0, length = 0x0002
    INT17                   : origin = 0xFFB2, length = 0x0002
    INT18                   : origin = 0xFFB4, length = 0x0002
    INT19                   : origin = 0xFFB6, length = 0x0002
    INT20                   : origin = 0xFFB8, length = 0x0002
    INT21                   : origin = 0xFFBA, length = 0x0002
    INT22                   : origin = 0xFFBC, length = 0x0002
    INT23                   : origin = 0xFFBE, length = 0x0002
    INT24                   : origin = 0xFFC0, length = 0x0002
    INT25                   : origin = 0xFFC2, length = 0x0002
    INT26                   : origin = 0xFFC4, length = 0x0002
    INT27                   : origin = 0xFFC6, length = 0x0002
    INT28                   : origin = 0xFFC8, length = 0x0002
    INT29                   : origin = 0xFFCA, length = 0x0002
    INT30                   : origin = 0xFFCC, length = 0x0002
    INT31                   : origin = 0xFFCE, length = 0x0002
    INT32                   : origin = 0xFFD0, length = 0x0002
    INT33                   : origin = 0xFFD2, length = 0x0002
    INT34                   : origin = 0xFFD4, length = 0x0002
    INT35                   : origin = 0xFFD6, length = 0x0002
    INT36                   : origin = 0xFFD8, length = 0x0002
    INT37                   : origin = 0xFFDA, length = 0x0002
    INT38                   : origin = 0xFFDC, length = 0x0002
    INT39                   : origin = 0xFFDE, length = 0x0002
    INT40                   : origin = 0xFFE0, length = 0x0002
    INT41                   : origin = 0xFFE2, length = 0x0002
    INT42                   : origin = 0xFFE4, length = 0x0002
    INT43                   : origin = 0xFFE6, length = 0x0002
    INT44                   : origin = 0xFFE8, length = 0x0002
    INT45                   : origin = 0xFFEA, length = 0x0002
    INT46                   : origin = 0xFFEC, length = 0x0002
    INT47                   : origin = 0xFFEE, length = 0x0002
    INT48                   : origin = 0xFFF0, length = 0x0002
    INT49                   : origin = 0xFFF2, length = 0x0002
    INT50                   : origin = 0xFFF4, length = 0x0002
    INT51                   : origin = 0xFFF6, length = 0x0002
    INT52                   : origin = 0xFFF8, length = 0x0002
    INT53                   : origin = 0xFFFA, length = 0x0002
    INT54                   : origin = 0xFFFC, length = 0x0002
    RESET                   : origin = 0xFFFE, length = 0x0002
}

/****************************************************************************/
/* SPECIFY THE SECTIONS ALLOCATION INTO MEMORY                              */
/****************************************************************************/

SECTIONS
{
    GROUP(ALL_FRAM)
    {
       GROUP(READ_WRITE_MEMORY): ALIGN(0x0400) RUN_START(fram_rw_start)
       {
          .cio        : {}                   /* C I/O BUFFER                      */
          .sysmem     : {}                   /* DYNAMIC MEMORY ALLOCATION AREA    */
       }

       GROUP(READ_ONLY_MEMORY): ALIGN(0x0400) RUN_START(fram_ro_start)
       {
/*          .cinit      : {}                    INITIALIZATION TABLES             */
          .pinit      : {}                   /* C++ CONSTRUCTOR TABLES            */
          .init_array : {}                   /* C++ CONSTRUCTOR TABLES            */
          .mspabi.exidx : {}                 /* C++ CONSTRUCTOR TABLES            */
          .mspabi.extab : {}                 /* C++ CONSTRUCTOR TABLES            */
          .const      : {}                   /* CONSTANT DATA                     */
       }

       GROUP(IPENCAPSULATED_MEMORY): ALIGN(0x0400) RUN_START(fram_ipe_start) RUN_END(fram_ipe_end)
       {
          .ipe       : {}                   /* CODE                              */
       }

       GROUP(EXECUTABLE_MEMORY): ALIGN(0x0400) RUN_START(fram_rx_start)
       {
          .text       : {}                   /* CODE                              */
       }
    } > FRAM | FRAM2

    .bss        : {} > FRAM | RAM		/* GLOBAL & STATIC VARS              */
    .data       : {} > FRAM     		/* GLOBAL & STATIC VARS              */
    .stack      : {} > RAM (HIGH)       /* SOFTWARE SYSTEM STACK             */
    .cinit      : {} > FRAM
	.TI.noinit 	: {} > FRAM 			/* For #pragma NOINIT */
	.TI.persistent : {} > FRAM 			/* For #pragma PERSISTENT */
    .infoA     : {} > INFOA             /* MSP430 INFO FRAM  MEMORY SEGMENTS */
    .infoB     : {} > INFOB
    .infoC     : {} > INFOC
    .infoD     : {} > INFOD

    /* MSP430 INTERRUPT VECTORS          */
    .int00       : {}               > INT00
    .int01       : {}               > INT01
    .int02       : {}               > INT02
    .int03       : {}               > INT03
    .int04       : {}               > INT04
    .int05       : {}               > INT05
    .int06       : {}               > INT06
    .int07       : {}               > INT07
    .int08       : {}               > INT08
    .int09       : {}               > INT09
    .int10       : {}               > INT10
    .int11       : {}               > INT11
    .int12       : {}               > INT12
    .int13       : {}               > INT13
    .int14       : {}               > INT14
    .int15       : {}               > INT15
    .int16       : {}               > INT16
    .int17       : {}               > INT17
    .int18       : {}               > INT18
    .int19       : {}               > INT19
    .int20       : {}               > INT20
    .int21       : {}               > INT21
    .int22       : {}               > INT22
    .int23       : {}               > INT23
    .int24       : {}               > INT24
    .int25       : {}               > INT25
    .int26       : {}               > INT26
    .int27       : {}               > INT27
    .int28       : {}               > INT28
    .int29       : {}               > INT29
    AES256       : { * ( .int30 ) } > INT30 type = VECT_INIT
    RTC          : { * ( .int31 ) } > INT31 type = VECT_INIT
    PORT4        : { * ( .int32 ) } > INT32 type = VECT_INIT
    PORT3        : { * ( .int33 ) } > INT33 type = VECT_INIT
    TIMER3_A1    : { * ( .int34 ) } > INT34 type = VECT_INIT
    TIMER3_A0    : { * ( .int35 ) } > INT35 type = VECT_INIT
    PORT2        : { * ( .int36 ) } > INT36 type = VECT_INIT
    TIMER2_A1    : { * ( .int37 ) } > INT37 type = VECT_INIT
    TIMER2_A0    : { * ( .int38 ) } > INT38 type = VECT_INIT
    PORT1        : { * ( .int39 ) } > INT39 type = VECT_INIT
    TIMER1_A1    : { * ( .int40 ) } > INT40 type = VECT_INIT
    TIMER1_A0    : { * ( .int41 ) } > INT41 type = VECT_INIT
    DMA          : { * ( .int42 ) } > INT42 type = VECT_INIT
    USCI_A1      : { * ( .int43 ) } > INT43 type = VECT_INIT
    TIMER0_A1    : { * ( .int44 ) } > INT44 type = VECT_INIT
    TIMER0_A0    : { * ( .int45 ) } > INT45 type = VECT_INIT
    ADC12        : { * ( .int46 ) } > INT46 type = VECT_INIT
    USCI_B0      : { * ( .int47 ) } > INT47 type = VECT_INIT
    USCI_A0      : { * ( .int48 ) } > INT48 type = VECT_INIT
    WDT          : { * ( .int49 ) } > INT49 type = VECT_INIT
    TIMER0_B1    : { * ( .int50 ) } > INT50 type = VECT_INIT
    TIMER0_B0    : { * ( .int51 ) } > INT51 type = VECT_INIT
    COMP_E       : { * ( .int52 ) } > INT52 type = VECT_INIT
    UNMI         : { * ( .int53 ) } > INT53 type = VECT_INIT
    SYSNMI       : { * ( .int54 ) } > INT54 type = VECT_INIT
    .reset       : {}               > RESET  /* MSP430 RESET VECTOR         */
}

/****************************************************************************/
/* MPU/IPE SPECIFIC MEMORY SEGMENT DEFINITONS                               */
/****************************************************************************/
/* IPE settings
/* To enable the IPE a header needs to be added to the IPE code segment
/* In addition a signature needs to be added to the device signature memory
/* On the following startup the signatures will be evaluated and the ipe
/* will be enabled.
/****************************************************************************/

// To enable the IPE segment
#ifdef _IPE_ENABLE
    __mpuipc0 = 0x0040;                 // (MPUIPENA)
    // Segment definitions
    __mpuipsegb2 = fram_ipe_end >> 4;
    __mpuipsegb1 = fram_ipe_start + 0x400 >> 4;  // Attention if areas are to small we need to fill up
    // xor parity as checksum for the ipp header
    __mpuipxor = ~((__mpuipc0 & __mpuipsegb2 & __mpuipsegb1) | (__mpuipc0 & ~__mpuipsegb2 & ~__mpuipsegb1) | (~__mpuipc0 & __mpuipsegb2 & ~__mpuipsegb1) | (~__mpuipc0 & ~__mpuipsegb2 & __mpuipsegb1));
#endif

/****************************************************************************/
/* MPU settings
/* The mpu can be used to configure the access rights to 3 different memory
/* segments. The options will be enabled after system startup in the C
/* startup routines.
/****************************************************************************/

// To enable MPU segments
#ifdef _MPU_ENABLE
    __mpuctl0 = 0xA501;                 // (MPUENA)
    // Segment definitions
    __mpusegb2 = fram_ro_start >> 4;
    __mpusegb1 = fram_rx_start >> 4;
    // Segment Access Management
    __mpusam = 0x4645;                    // Info R, Seg3 RX, Seg2 R, Seg1 RW
#endif

/****************************************************************************/
/* INCLUDE PERIPHERALS MEMORY MAP                                           */
/****************************************************************************/

-l msp430fr5969.cmd

Thanks!

Antoine

0 Gilbert Rodriguez III over 9 years ago in reply to Antoine Bodiguel

TI__Intellectual 2275 points

Hi Antoine,

After discussing things with one of my colleagues, it seems like you should be able to place the interrupt vector in RAM by adding this to your .cfg:

var Hwi = xdc.useModule('ti.sysbios.family.msp430.Hwi'); // If not already present
Hwi.plugMeta(<intNum>, <ram func address>); // Bypass dispatcher and call <ram func> directly. <ram func> can be placed in any memory by user

You would be using #pragma to define your function, but this should allow you to place the desired interrupts into RAM.

Regards,

Gilbert

0 Antoine Bodiguel over 9 years ago in reply to Gilbert Rodriguez III

Prodigy 40 points

Thanks for your reply Gilbert!

I'm going to try that then.

Will come back with some feedback (and mark the topic as answered if ot worked)

Antoine

0 Antoine Bodiguel over 9 years ago in reply to Gilbert Rodriguez III

Prodigy 40 points

Hi,
As promised, here is a little feedback :

We tried your solution (the script lines + #pragma to define the interrupts), which appears to work for the interrupts we managed to locate. It seems that the interrupts defined in the SYSBIOS are not all present in the source files even though we searched through the whole workspace, that surprised us a little!

But we finally came up with another solution for our problem. I initially developped the bootloader with as few interrupts as possible. I modified it a little to make it work without interrupts at all. Now that it's working without them, we can use the original IVT for the application (~ except for the reset vector, which starts on bootloader but then jumps the the application start-up sequence).

I know it's not really resolving the original problem but if that can help anyone with similar issues, I'll just leave that here.

Thanks for your help Gilbert, really appreciate it!

Antoine

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Interrupt Vector Table management with TI-RTOS and custom Bootloader - MSP430FR5969