Hello,
I have some simple questions concerning the timer plus functionality in the OMAPL138. Formerly we used a timer in the DM642 which sends an edma event when the count register reaches the value in the period register. The Timer is reset and continues counting. The edma reloads the count register with a value out of a table in memory (no reload register available). Now we want to do the same with the timer plus in the OMAPL138. My questions are:
- Do we need the timer plus functionality (reload,...) to achieve the functionality described above?
- Are we allowed to write to the timer counter register while the timer is running (plus features disabled)? (see 2.1.5.2 of sprufm5a)
- Is it necessary to acknowledge the edma event in INTCTLSTAT? In the dm642 there was no need to acknowledge the edma event.
Thanks for your help
One additional question:
Is it allowed to address the timer registers in 8 or 16bit mode? E.g. can we read/write 8 or 16bit data from/to the timer registers (for example TCR)? This is necessary since we work in 32bit unchained mode and one 32bit timer is used by the arm while the other is used by the dsp. So in TCR and INTCTLSTAT the arn and the dsp should only read and write the bits according to their own 32 bit timer (1/2 or 3/4) without affecting the other bits.