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Error in connecting to 6678 custom board

Other Parts Discussed in Thread: CDCE62005

Hi

I designed a custom board with 6678 and used Spartan for power and reset sequence, also I used 2 cdce62005 such as EVM for clock distributing and I set core clock and pass clock to 100MHz. When I want to connect to the board, I face with error 2131:

Error connecting to the target:

(Error -2131 @ 0x0)

Unable to access device register. Reset the device, and retry the operation. If

error persists, confirm configuration, power-cycle the board, and/or try

more reliable JTAG settings (e.g. lower TCLK).

 

I designed 2 type of jtag on my board, XDS100v1 and XDS100v2 and I tested them on the other board and they worked, and my cable is right too.

 

Also I have second problem. I know that the sysclockout is output clock divide by six and for 1GHz DSP I expect that be ((1000/6)=166.67MHz)
 but it is 16.67MHZ= (100/6) = (coreclock/6). Does it mean that PLL of DSP doesn’t work?

Consider that DSP consumes power.

What can I do for connecting to the board? Please help.

Thank you

  • Please set boot mode to "DSP no boot mode" and reduce the JTAG clock in adaptive mode in CCS target configuration settings.
    processors.wiki.ti.com/.../XDS100

    Please make sure that POWER ON sequence is proper and DSP is out of RESET.


    Also I have second problem. I know that the sysclockout is output clock divide by six and for 1GHz DSP I expect that be ((1000/6)=166.67MHz)
    but it is 16.67MHZ= (100/6) = (coreclock/6). Does it mean that PLL of DSP doesn’t work?

    Yes, you should get 166.66MHz (SYSCLK7 -> 1/6 -> SYSCLKOUT)

    I think, PLL is in bypass mode, are you using 100MHz as CLKIN ??
    If yes, then PLL is in BYPASS mode.
    In BYPASS mode, PLL output clock is same as CLKIN, so 100/6=16.66MHz

    Also please check with CCS folks on this CCS issue.
    e2e.ti.com/.../81