Hello,
I am working on OMAP3530 programming with CCS3.3. I choose to program directly the registers (without CSL).
My objective is to write a loopback based on ping-pong buffering process (3 types of buffer: in, out and processing). I have seen some different examples, but they used CSL function.
But proceeding by step, I have an other issue.
I have managed to program an EDMA channel, which gets DMA request from McBSP2.
I mean there is only one channel, which receives data from DRR (McBSP receive register).
The DMA channel has to fill a buffer many times in a loop and it works fine the first time only.
In my program I send data into McBSP and get them back in DRR with eDMA.
I send data in my process_function and when the transfer of MAXSAMPLE data is completed , the eDMA channel generates an interrupt that execute my ISR_function in which I post a semaphore.
This process allows the loop inside the process_function to follow its execution and not to be stopped by the SEM_pend instruction.
I am aware of that the ISR is triggered only once because the semaphore pending turns into an infinite loop the second time.
So I don’t understand why the eDMA channel and the ISR function are not triggered another time, I probably missed something.
Perhaps I have forgotten to re-initialize some register like the WUGEN one or other initialising register ?
One more question to sum up: How could I generate an interrupt many times using eDMA channel ?
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EDIT: I noticed something odd with my EVTFLAG registers. There are 2 others events setted for the execution of the ISR function.
I mean I have program the generation of the TPCC global interrupt (evt 29 in the IVA2.2 Interrupt Mappings) and the evt 36 and 37 are setted too.
I was wondering if the TPCC global interrupt does not launch also TPCC region 1 and 2 interrupts ?
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This is my eDMA channel configuration :
DMA channel : 3
Logical channel (PSET) : 12
TCINTEN = 1 , TCC = 3, SYNCDIM = 0 (A-sync)
OPT = 0x00103000;
SRC = (Uint32)&MCBSPLP_DRR_REG;
B_A_CNT = (MAXSAMPLE << BIT_16_SHIFT ) | (4 );
DST = (Uint32)&(dstArray[0]);
DST_SRC_BIDX = ( 4 << 16 ) | ( 0 );
BCNTRLD_LINK = ( 1 << 16 ) | 0x4180; // link to its own PaRAM set
DST_SRC_CIDX = 0x00000000;
CCNT = 0x00000001;
And here is my ISR_function:
(tcc_value = DMA channel = 3)
void ISR_function()
{
if( (TPCC_IPR >>tcc_value) & 0x1 == 1)
{
// post semaphore
SEM_post(&DMA_Rx_in);
TPCC_ICR |= (1<<tcc_value); // clear IPR[tcc_value] bit
TPCC_ICR = 0x0;
}
INTC_EVTCLR(0)|= (1<<29); // Clear CPU interrupt event 29
}
Thank you for your help,
Michael