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full screen resolution(1280x800) support in RVC2-3 release On J6 EVM board

Joe Shen
Expert 4065 points

Other Parts Discussed in Thread: PCF8575

In the latest RVC release 2-phrase3, the default display size is 720x480, is it possible to support full screen size 1280x800 to display on J6 EVM board?

the input data size from camera is 720x480, VPE handle the same size data. Is DSS block responsible to scale from 720x480 to 1280x800?

  • 0
    TI__Intellectual 1285 points
    Hi Joe,

    Your question has been forwarded to an expert.

    Best regards
    Lucy
  • 0 in reply to Lyudmila Kamenova
    TI__Intellectual 2540 points
    Hi Joe,
    On RVC-2.0, you can change the size up to 1280x750. When configuring height to 800, it causes fence timeout while Android startup. Maybe due to the status bar. We don't have a reason for that yet.
    So, currently you can modify RVC-2.0, to 1280x750.
    You will need to change the VID2 and VID3 start position (posX and posY) and Width and Height for Video and Grpx.
    You will also need to turn off the automatic update. Easy way is to comment the RVC_perFrameDiagnostics(COMPARE_SOME_REGISTERS) call. Or modify the appropriate registers for the position and resolution changes to DSS_DISPC_VID2_POSITION, DSS_DISPC_VID2_SIZE, DSS_DISPC_VID2_ATTRIBUTES, DSS_DISPC_VID2_FIR, DSS_DISPC_VID3_POSITION, DSS_DISPC_VID3_SIZE, and DSS_DISPC_VID3_ATTRIBUTES.
    Thanks.
    //Buddy
  • 0 in reply to Buddy L.
    TI__Expert 4065 points
    Hi Buddy,

    thanks for your feedback, follow your suggestion the full screen is ok. we use the global alpha setting to switch RVC screen and android.
    while the reverse signal is detected by IPU, software will access the global alpha register directly to switch the display screen.
    but we met some registers like transparent color which cannot be accessed after linux kernel started, is there some policy to control the register access right between IPU and A15?

    Thanks
    Joe
  • 0 in reply to Joe Shen
    TI__Intellectual 2540 points
    On RVC-2.0, no policy yet to control the register access between M4 and A15, except for automatic detection and update to the reference default configuration. Which specific register that you are not able to access to it? Is it the DISPC_GLOBAL_ALPHA (0x58001074)? On the RVC-2.0, after Androids boot up, on terminal, after setting to root user, I was able to hid the VID3 using "omapconf write 0x58001074 0xFFFFFF".
  • 0 in reply to Buddy L.
    TI__Expert 4065 points
    Hi Buddy,

    the DISPC_GLOBAL_ALPHA register can be accessed between M4 and A15, customer use the GPIO as reverse signal, it cannot write the GPIO8 register while using "omapconf write 0x48053134 xxxx", the error information is "sorry function disable in safe mode". do you meet this same error log?
  • 0 in reply to Joe Shen
    TI__Intellectual 2540 points

    Hi Joe,

    Since the issue of "full screen resolution(1280x800) support in RVC2-3 release On J6 EVM board" has been resolved, I think you need to close this thread and start a new thread on configuring GPIO8 register. I am not familiar with GPIO but maybe others can provide better information from kernel or Android HLOS perspective.

    From Vishal M., I got some information and I tried on my J6 EVM with 6AM.1.0 + Robust RVC-2.0.

    On my system with GP silicon, by default GPIO8 (port 224-255) is not getting used/configured, so PMIC might disabled it because I am getting:

    # omapconf read 0x48053134

    [ 436.381174] Unhandled fault: asynchronous external abort (0x1211) at 0x00000000


    !!! OUPS... MEMORY ERROR @ 0x00000000 !!!
    Are you sure that:
    MEMORY ADDRESS IS VALID?
    TARGETED MODULE IS CLOCKED?

     

    # cat /d/gpio

    GPIOs 0-31, gpio:

    GPIOs 32-63, gpio:

    GPIOs 64-95, gpio:

    GPIOs 96-127, gpio:

    GPIOs 128-159, gpio:

    gpio-132 (kim                 ) out lo

    gpio-136 (vmmcwl_fixed        ) out lo

    GPIOs 160-191, gpio:

    gpio-180 (xref3_clk           ) out hi

    gpio-187 (mmc_cd              ) in  hi IRQ

    GPIOs 192-223, gpio:

    gpio-203 (vtt_fixed           ) out hi

    gpio-204 (hdmi_hpd            ) in  lo

    GPIOs 224-255, gpio:

    GPIOs 448-463, i2c/3-0021, pcf8575, can sleep:

    GPIOs 464-479, i2c/1-0026, pcf8575, can sleep:

    gpio-468 (hdmi_ct_cp_hpd      ) out hi

    gpio-469 (hdmi_ls_oe          ) out lo

    GPIOs 480-495, i2c/0-0021, pcf8575, can sleep:

    gpio-481 (id                  ) in  hi

    gpio-482 (id                  ) in  hi

    gpio-485 (evm_3v3_sd          ) out lo

    gpio-494 (uart_sel            ) out lo

    GPIOs 496-511, i2c/0-0020, pcf8575, can sleep:

    gpio-509 (enable              ) out lo

    From https://www.kernel.org/doc/Documentation/gpio/sysfs.txt , I try using the command from userspace to ask the kernel to export control of GPIO port 255 to userspace.

    # echo 225 > export

    Now, # cat /d/gpio print shows gpio-225 node is created for GPIO #255 on GPIO 8 bank. In your case, the kernel code should requested for GPIO port to be created.

    GPIOs 224-255, gpio:
    gpio-225 (sysfs ) in lo

    After that I am able to perform:

    # omapconf read 0x48053134
    FFFFFFFD

    # omapconf write 0x48053134 0xFFFFFFFD

    # omapconf read 0x48053134
    FFFFFFFD

    But you probably need to close this thread as it has deviated from full screen to GPIO issue. On the new thread, please specify as well if you are using GP or HS silicon?

    Thanks.

    //Buddy

  • 0 in reply to Buddy L.
    TI__Expert 4065 points
    Hi Buddy,

    full screen issue has been fixed by your suggestions. many thanks for your kindly help.

    Joe