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DSP code not running when boot in NADA mode but works fine when load using emulator

Other Parts Discussed in Thread: OMAP-L138, OMAPL138

Hi everyone,

my dsp code works fine on OMAP-L138 using emulator, but not running when boot from NADA if the section in red is in L2. If I move it to DDR2, then it works. what could be the issues?  my EDMA, McASP are not working no matter the red section is in L2 or DDR2, but it work fine using emulator.

any helo is appreciated!

Ron

-stack 0x10000
-heap 0x10000

// ============================================================================
// Specify the System Memory Map
// ============================================================================
MEMORY
{

L1P: o = 0x11E00000 l = 0x00008000
L1D: o = 0x11F00000 l = 0x00008000
L2: o = 0x11800000 l = 0x0003F980
DARAM_MATRICE: o = 0x1183F980 l = 0x00000280
DARAM_TTY_DATA: o = 0x1183FC00 l = 0x00000300
DARAM_TTY_COEFF: o = 0x1183FF00 l = 0x00000100
shared_ROM_DSP: o = 0x80000000 l = 0x00003FFF
entry_point: o = 0x80004000 l = 0x00000100
shared_ram_DSP: o = 0x80004100 l = 0x00010F00
DDR2: o = 0xC0000000 l = 0x01000000
}

// ============================================================================
// Specify the Sections Allocation into Memory
// ============================================================================
SECTIONS
{
.cinit > DDR2 // Initialization Tables
.pinit > DDR2 // Constructor Tables
.init_array > L2 //
.binit > DDR2 // Boot Tables
.const > DDR2 // Constant Data
.switch > DDR2 // Jump Tables
.text > DDR2 // Executable Code
// .text:_c_int00: align=1024 > DDR2 // Entrypoint
.text:_c_int00 > entry_point

GROUP (NEARDP_DATA) // group near data
{
.neardata
.rodata
.bss // note: removed fill = 0
}> DDR2
.far: fill = 0x0, load > DDR2 // Far Global & Static Variables
.fardata > DDR2 // Far RW Data
.stack > L2 // Software System Stack
.sysmem > L2 // Dynamic Memory Allocation Area

.cio > DDR2 // C I/O Buffer
.vecs > DDR2 // Interrupt Vectors
BdtFIR > DARAM_TTY_COEFF

/* DPR
{
MemoirePartageeUSB.obj
} > DDR2 */

}


  • my EDMA, McASP are not working no matter the red section is in L2 or DDR2, but it work fine using emulator.

    Did you enable the PSC and PINMUX for McASP and EDMA while AIS conversion ?
  • Hi

    [quote user="Rong wang2"] my dsp code works fine on OMAP-L138 using emulator, but not running when boot from NADA if the section in red is in L2. If I move it to DDR2, then it works. what could be the issues?  my EDMA, McASP are not working no matter the red section is in L2 or DDR2, but it work fine using emulator. [/quote ]

    If a program works using emulator and if it doesnot work after flashing then the problem lies in the settings done in the AIGgen utility which is used to convert the *.out into the AIS formatted binary.

    In the AIS gen tool, Please focus on the configuration settings like

    =================================================

    Flash - Configures data width (NOR only) and EMIF timing for Flash interface

    Peripheral - Configures peripheral speed and enables sequential read

    PLL0 - Configures PLL0 clock multiplication and division

    SDRAM - Configures SDRAM interface register settings

    PLL1 - Configures PLL1 clock multiplication and division

    DDR - Configures DDR interface register settings

    PSC - Allows LPSCs to be turned on, turned off, or placed in sync. reset

    Pinmux - Configures Pinmux registers

     

    For more info onm AIS gen tool usage, please visit :

     

  • Hi Titus,

    I enable the PSC and PINMUX for McASP and EDMA in DSP code not in AIS conversion. is this a problem? I will give a try.

    Thanks,

    Ron

  • Hi Shankari,

    Thanks for your suggestion.
    after re-configured Pinmux and PSC in AISgen, the EDMA and McAsp start working. the only thing still bother me is that red section in my cmd file can only be loaded to DDR, not L2 to make DSP code running. But the execution time is almost double than in L2. what configureation is missing?

    Ron
  • Hi Ron
    Are you sure that you are enabling the DSP when you are booting from flash?
    Far fetched but i have to ask

    See the wiki
    processors.wiki.ti.com/.../Boot_Images_for_OMAP-L138

    Regards
    Mukul
  • Can you confirm that you are using OMAPL138 device and not the DSP only variant C6748. The reason that I ask is OMAPL138 is a ARM boot device and would require ARM code to wake up the DSP and run code on it. On the other hand if you are using C6748 (DSP only) then this is a DSP boot master device and may be using part of L2 memory during boot. (Note: OMAPL138 doesn`t use DSP L2 for NAND boot).

    Also, use the "Configure PSC" function of AISGen to enable the DSP LPSC (PSC0,#15). If the DSP megamodule is in reset, the L2 RAM will not be accessible so the section loads will fail.


    Regards,
    Rahul

  • Hi Mukul,

    Yes, the DSP is enabled when booting from flash. It works fine if I just move the red section in DDR2 in .cmd file. It only did not work if I put the red section in L2 but still keep .text>DDR2.
  • Hi Rahul,

    Yes, I am using OMAPL138 device. I did have ARM code as well as bootloader from Startware_1_10_04_01. so far, in my cmd file. if load as CASE1 below, it works, but just very slow. if load as CASE2 below, the DSP code is not running. It seems to not allow me to load into L2. Just wonder it is configuration issue or bootloader issue?

    //------CASE1--------
    SECTIONS
    {
    .cinit > DDR2 // Initialization Tables
    .pinit > DDR2 // Constructor Tables
    .init_array > L2 //
    .binit > DDR2 // Boot Tables
    .const > DDR2 // Constant Data
    .switch > DDR2 // Jump Tables

    -----------------------------------------------------------
    //------CASE2--------
    SECTIONS
    {
    .cinit > L2// Initialization Tables
    .pinit > L2// Constructor Tables
    .init_array > L2 //
    .binit > L2// Boot Tables
    .const > L2// Constant Data
    .switch > L2// Jump Tables

    Thanks,

    Ron
  • Have you tried to use the Shared RAM instead of using L2 for DSP app ?

    Add the below entry in your linker command file for shared RAM.

        SHRAM        o = 0x80000000  l = 0x00020000  /* 128kB Shared RAM */


    I hope you have used the L2 RAM entry address (from DSP *.map file) in ARM starterware bootloader.

    processors.wiki.ti.com/.../OMAPL138_StarterWare_Booting_And_Flashing

    Let me try and update you.

  • Dear Ron,
    I'm able to boot the DSP GPIO example on OMAPL138 LCDK board using ARM starterware bootloader and DSP GPIO app.


    C:\ti\OMAPL138_StarterWare_1_10_04_01\build\armv5\cgt_ccs\omapl138\lcdkOMAPL138\gpio
    C:\ti\OMAPL138_StarterWare_1_10_04_01\build\armv5\cgt_ccs\omapl138\lcdkOMAPL138\bootloader

    -stack 0x1000
    -heap 0x1000

    // ============================================================================
    // Specify the System Memory Map
    // ============================================================================
    MEMORY
    {
    L1P: o = 0x11E00000 l = 0x00008000
    L1D: o = 0x11F00000 l = 0x00008000
    L2: o = 0x11800000 l = 0x00040000
    DDR2: o = 0xC0000000 l = 0x08000000
    }

    // ============================================================================
    // Specify the Sections Allocation into Memory
    // ============================================================================
    SECTIONS
    {
    .cinit > L2 // Initialization Tables
    .pinit > L2 // Constructor Tables
    .init_array > L2 //
    .binit > L2 // Boot Tables
    .const > L2 // Constant Data
    .switch > L2 // Jump Tables
    .text > L2 // Executable Code
    .text:_c_int00: align=1024 > L2 // Entrypoint

    GROUP (NEARDP_DATA) // group near data
    {
    .neardata
    .rodata
    .bss // note: removed fill = 0
    } > L2
    .far: fill = 0x0, load > L2 // Far Global & Static Variables
    .fardata > L2 // Far RW Data
    .stack > L2 // Software System Stack
    .sysmem > L2 // Dynamic Memory Allocation Area

    .cio > L2 // C I/O Buffer
    .vecs > L2 // Interrupt Vectors
    }


    //------CASE2--------
    SECTIONS
    {
    .cinit > L2// Initialization Tables
    .pinit > L2// Constructor Tables
    .init_array > L2 //
    .binit > L2// Boot Tables
    .const > L2// Constant Data
    .switch > L2// Jump Tables


    I'm also able to boot the DSP GPIO example like your case2. (some of sections would be in L2)

    -stack 0x1000
    -heap 0x1000

    // ============================================================================
    // Specify the System Memory Map
    // ============================================================================
    MEMORY
    {
    L1P: o = 0x11E00000 l = 0x00008000
    L1D: o = 0x11F00000 l = 0x00008000
    L2: o = 0x11800000 l = 0x00040000
    DDR2: o = 0xC0000000 l = 0x08000000
    }

    // ============================================================================
    // Specify the Sections Allocation into Memory
    // ============================================================================
    SECTIONS
    {
    .cinit > L2 // Initialization Tables
    .pinit > L2 // Constructor Tables
    .init_array > L2 //
    .binit > L2 // Boot Tables
    .const > L2 // Constant Data
    .switch > L2 // Jump Tables
    .text > DDR2 // Executable Code
    .text:_c_int00: align=1024 > DDR2 // Entrypoint

    GROUP (NEARDP_DATA) // group near data
    {
    .neardata
    .rodata
    .bss // note: removed fill = 0
    } > DDR2
    .far: fill = 0x0, load > DDR2 // Far Global & Static Variables
    .fardata > DDR2 // Far RW Data
    .stack > DDR2 // Software System Stack
    .sysmem > DDR2 // Dynamic Memory Allocation Area

    .cio > DDR2 // C I/O Buffer
    .vecs > DDR2 // Interrupt Vectors
    }


    For experiments, use DSP GPIO example and narrow down your problem.

     

  • Hi Titus,

    Thanks for your help!

    In your test, the DSP GPIO app is running on ARM core or DSP core? if it is on DSP core, did you use any arm supporting code(such as wake up DSP core)?

    maybe I did not express clearly. My code runs on DSP core, not ARM Core.

    Regards,

    Ron


  • In your test, the DSP GPIO app is running on ARM core or DSP core? if it is on DSP core, did you use any arm supporting code(such as wake up DSP core)?


    Yes Rong, I am using the DSP GPIO to run on DSP core, that's why I every time mentioned as DSP GPIO app.

    You no need to add/change anything in either starterware bootloader or DSP app, but mention the DSP entry point into ARM starterware bootloader code.

    Actual ARM starterware bootloader is waking up the DSP core to run the DSP GPIO app.

    Please refer to the ARM Starterware bootloader code.
    Also please refer to the wiki page which I have given in last post.

  • Oh! sorry for the confusion on this location of GPIO example code.
    C:\ti\OMAPL138_StarterWare_1_10_04_01\build\armv5\cgt_ccs\omapl138\lcdkOMAPL138\gpio

    I mentioned wrongly, actually it is.,
    C:\ti\OMAPL138_StarterWare_1_10_04_01\build\c674x\cgt_ccs\omapl138\lcdkOMAPL138\gpio

  • Hi Titus,

    I used the bootloader from there and used following precedures to boot DSP:
    1) create .bin using out2rprc myARM.out myDSP.out test.bin
    2) create boot.ais file using AISgen, and boot.out as input file, boot.ais as output file
    3)flash using: sfh_OMAP-L138.exe -flash boot.ais test.bin -targetType OMAPL138_LCDK -flashType NAND -p COM4

    Did I miss anything?

    Could you send me your boot.out and ais.cfg ? I'd like to do a quick test to see if my DSP code can work with your bootloader? what entry point is set in your bootloader?

    Thanks,

    Ron
  • 1) create .bin using out2rprc myARM.out myDSP.out test.bin

    Seems, you are trying to run both ARM app and DSP app with ARM bootloader.

    But I used to run the DSP GPIO app with ARM bootloader.

    C:\ti\OMAPL138_StarterWare_1_10_04_01\tools\out2rprc>out2rprc.exe gpioLed.out gpioLed.bin

    Parsing the input object file, gpioLed.out.

    File conversion complete!

    C:\ti\OMAPL138_StarterWare_1_10_04_01\tools\out2rprc>

    2) create boot.ais file using AISgen, and boot.out as input file, boot.ais as output file

    3)flash using: sfh_OMAP-L138.exe -flash boot.ais test.bin -targetType OMAPL138_LCDK -flashType NAND -p COM4

    I did like below. (only ARM bootloader and DSP GPIO app)

    sfh_OMAP-L138.exe -flash boot.ais gpioLed.bin -targetType OMAPL138_LCDK -flashType NAND -p COM3

    Can you please try the below ARM bootloader, DSP GPIO and attached CFG (plus given linker command file from earlier discussion) ?

    C:\ti\OMAPL138_StarterWare_1_10_04_01\build\armv5\cgt_ccs\omapl138\lcdkOMAPL138\bootloader\Debug\boot.out

    DSP GPIO LED out:

    C:\ti\OMAPL138_StarterWare_1_10_04_01\build\c674x\cgt_ccs\omapl138\lcdkOMAPL138\gpio\Debug\gpioLed.out

    7288.OMAPL138-DSP-LED-NAND-SPI-UART.cfg


    Please let me know if anything.

  • Hi Titus,

    There is no debug folder in my StarterWare_1_10_04_01\build\armv5\cgt_ccs\omapl138\lcdkOMAPL138\bootloader\

    so could you send your boot.out file?

    Thanks,

     

    Ron

  • Please import the ARM bootloader in CCS and rebuild it, you would get the boot.out file in Debug folder.
    C:\ti\OMAPL138_StarterWare_1_10_04_01\build\armv5\cgt_ccs\omapl138\lcdkOMAPL138\bootloader

    My .out won't solve your issue as I have different entry point I used based on my DSP GPIO out file.

    C:\ti\OMAPL138_StarterWare_1_10_04_01\bootloader\src\bl_main.c
    unsigned int DspEntryPoint = 0xc0002000;

    This the entry point I have taken from DSP GPIO LED .map file.
    C:\ti\OMAPL138_StarterWare_1_10_04_01\build\c674x\cgt_ccs\omapl138\lcdkOMAPL138\gpio\Debug\gpio_c674x_omapl138_lcdkOMAPL138.map
    ******************************************************************************
    TMS320C6x Linker PC v7.4.14
    ******************************************************************************
    >> Linked Mon Sep 12 15:04:32 2016

    OUTPUT FILE NAME: <gpioLed.out>
    ENTRY POINT SYMBOL: "_c_int00" address: c0002000
  • Hi Titus,

    I build bootloader and DSP gpioLed and used your .cfg to created boot.ais. I flash my LCDK, but it did not work.
    could you send me your boot.out .cfg and gpioLed.out? so I can do a quick test to what the problem could be?

    Thanks,

    Rong
  • Hi Titus,

    I build boot.out and gpioLed.out using default cmd file and was able to boot DSP gpioLed app, but if you following cmd to rebuild DSP gpioLed, it did not boot anymore.

    // ============================================================================
    // Linker Command File for Linking c674 DSP Programs
    //
    // These linker options are for command line linking only. For IDE linking,
    // you should set your linker options in Project Properties.
    // -c Link Using C Conventions
    // -stack 0x1000 Software Stack Size
    // -heap 0x1000 Heap Area Size
    // ===========================================================================
    -stack 0x1000
    -heap 0x1000

    // ============================================================================
    // Specify the System Memory Map
    // ============================================================================
    MEMORY
    {
    L1P: o = 0x11E00000 l = 0x00008000
    L1D: o = 0x11F00000 l = 0x00008000
    L2: o = 0x11800000 l = 0x00040000
    DDR2: o = 0xC0000000 l = 0x08000000
    }

    // ============================================================================
    // Specify the Sections Allocation into Memory
    // ============================================================================
    SECTIONS
    {
    .cinit > L2 // Initialization Tables
    .pinit > L2 // Constructor Tables
    .init_array > L2 //
    .binit > L2 // Boot Tables
    .const > L2 // Constant Data
    .switch > L2 // Jump Tables
    .text > DDR2 // Executable Code
    .text:_c_int00: align=1024 > DDR2 // Entrypoint

    GROUP (NEARDP_DATA) // group near data
    {
    .neardata
    .rodata
    .bss // note: removed fill = 0
    } > DDR2
    .far: fill = 0x0, load > DDR2 // Far Global & Static Variables
    .fardata > DDR2 // Far RW Data
    .stack > DDR2 // Software System Stack
    .sysmem > DDR2 // Dynamic Memory Allocation Area

    .cio > DDR2 // C I/O Buffer
    .vecs > DDR2 // Interrupt Vectors
    }

  • I build boot.out and gpioLed.out using default cmd file and was able to boot DSP gpioLed app, but if you following cmd to rebuild DSP gpioLed, it did not boot anymore.

    It worked well for me.
    Please do make sure that you have used the entry point from the latest built DSP gpioLed app
    Please take the entry point from map file and use it in bootloader code.
    C:\ti\OMAPL138_StarterWare_1_10_04_01\build\c674x\cgt_ccs\omapl138\lcdkOMAPL138\gpio\Debug\gpio_c674x_omapl138_lcdkOMAPL138.map

    C:\ti\OMAPL138_StarterWare_1_10_04_01\bootloader\src\bl_main.c
    unsigned int DspEntryPoint = 0xc0002000;

    SO you need to rebuild the both DSP gpioLed app and ARM bootloader then boot.out to boot.ais and gpioLed.out to gpioLed.bin
  • Hi Titus,

    yes, I did like this. I build bother bootloader and gpioLed using original cmd file and boot dsp to ensure it is working, then I modified cmd for gpioLed by replace DDR2 by L2 (refer to the cmd file I sent to you), rebuild gpioLed, looked at the entrypoint in map file, updated entrypoint in bl_main.c and rebuild, but in this case, it did not work. I also tried to fix entry point using following cmd file, but it did not work. but if I just change L2 to DDR2, then it works fine. I am also able to run my DSP using this bootloader, it also works if DDR2, but not work if L2.  Could you give a try using this cmd file?

    // ============================================================================
    // Linker Command File for Linking c674 DSP Programs
    //
    // These linker options are for command line linking only. For IDE linking,
    // you should set your linker options in Project Properties.
    // -c Link Using C Conventions
    // -stack 0x1000 Software Stack Size
    // -heap 0x1000 Heap Area Size
    // ===========================================================================
    -stack 0x1000
    -heap 0x1000

    // ============================================================================
    // Specify the System Memory Map
    // ============================================================================
    MEMORY
    {
    L1P: o = 0x11E00000 l = 0x00008000
    L1D: o = 0x11F00000 l = 0x00008000
    L2: o = 0x11800000 l = 0x00040000
    entry_point: o = 0xC0000000 l = 0x00000100
    DDR2: o = 0xC0000100 l = 0x0003FF00
    }

    // ============================================================================
    // Specify the Sections Allocation into Memory
    // ============================================================================
    SECTIONS
    {
    .cinit > L2// Initialization Tables
    .pinit > L2// Constructor Tables
    .init_array > L2 //
    .binit > L2// Boot Tables
    .const > L2// Constant Data
    .switch > L2// Jump Tables
    .text > L2// Executable Code
    .text:_c_int00 > entry_point
    //.text:_c_int00: align=1024 > DDR2 // Entrypoint

    GROUP (NEARDP_DATA) // group near data
    {
    .neardata
    .rodata
    .bss // note: removed fill = 0
    } > L2
    .far: fill = 0x0, load > L2// Far Global & Static Variables
    .fardata > L2// Far RW Data
    .stack > L2 // Software System Stack
    .sysmem > L2 // Dynamic Memory Allocation Area

    .cio > L2// C I/O Buffer
    .vecs > DDR2 // Interrupt Vectors
    }

    Thanks,

    Ron

  • Dear Ron,

    What are the prints you have got in UART console port while you testing L2+DDR ?
    Sure, let me try and give you the bin and ais if its worked for me.
    Thanks for your patience.

  • Hi titus,

    Just BOOTME at beging. then nothing.

    Did you have a chance to try my cmd file with L2 setting?

    Regards,

    Ron

  • Seems, you set boot mode to UART.
    So, please set boot mode to NAND and check.
  • Hi Titus,

    yes, we verified that the boot mode is NADA, but the problem is still there.

    As I stated before, it wokrs fine if use DDR, and it only has problem when use L2. 

    Did you try my command file?

    thanks,

    Ron