Hi ,
We have our J6 custom board + Processor SDK Linux Automotive SDK , but kernel will always crash.
Could you help on this ?
Detail boot log and dts please see the attachment.
[ 3.053485] Unhandled fault: asynchronous external abort (0x1211) at 0x00000000
[ 3.053489] pgd = c0003000
[ 3.053496] [00000000] *pgd=80000080004003, *pmd=00000000
[ 3.053503] Internal error: : 1211 [#1] PREEMPT SMP ARM
[ 3.053508] Modules linked in:
[ 3.053515] CPU: 1 PID: 6 Comm: kworker/u4:0 Not tainted 4.4.14 #6
[ 3.053518] Hardware name: Generic DRA74X (Flattened Device Tree)
[ 3.053527] Workqueue: kmmcd mmc_rescan
[ 3.053531] task: eec89e00 ti: eecac000 task.ti: eecac000
[ 3.053538] PC is at arch_counter_get_cntvct+0x10/0x18
[ 3.053545] LR is at arch_timer_read_counter_long+0x1c/0x20
[ 3.053550] pc : [<c0557a20>] lr : [<c0016ef0>] psr: a0000013
[ 3.053550] sp : eecadd38 ip : eecadd48 fp : eecadd44
[ 3.053553] r10: 00000000 r9 : 00000001 r8 : eecadde8
[ 3.053557] r7 : 066665b0 r6 : 035aca34 r5 : 0000170d r4 : c0a57420
[ 3.053560] r3 : c0557a10 r2 : 65c22580 r1 : 00000000 r0 : 00001116
[ 3.053565] Flags: NzCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment kernel
[ 3.053569] Control: 30c5387d Table: 80003000 DAC: 55555555
[ 3.053573] Process kworker/u4:0 (pid: 6, stack limit = 0xeecac210)
[ 3.053577] Stack: (0xeecadd38 to 0xeecae000)
[ 3.053581] dd20: eecadd54 eecadd48
[ 3.053586] dd40: c0016ef0 c0557a1c eecadd74 eecadd58 c02b1338 c0016ee0 00000199 eecf8c00
[ 3.053592] dd60: c09f1274 066665b0 eecadd84 eecadd78 c02b1370 c02b12f0 eecaddac eecadd88
[ 3.053598] dd80: c053acb4 c02b1354 eecadde8 eecf8c00 eecf8c00 eecadea7 00000000 00000001
[ 3.053603] dda0: eecaddc4 eecaddb0 c053ae00 c053ac38 eecadde8 eecaddf8 eecadde4 eecaddc8
[ 3.053608] ddc0: c053aec0 c053ad14 eecade34 eecf8c00 00000000 eecadea7 eecade2c eecadde8
[ 3.053613] dde0: c053b470 c053ae7c 00000000 eecade34 00000000 00000000 00000000 00000000
[ 3.053619] de00: eecade00 eecade00 c053ae58 00000000 eecade3c 00000c00 00000c00 eecf8c00
[ 3.053624] de20: eecade94 eecade30 c0545e64 c053b41c 60000013 00000034 00000c00 00000000
[ 3.053629] de40: 00000000 00000000 00000000 00000195 00000000 00000000 00000000 00000000
[ 3.053635] de60: 00000000 eecadde8 c053b060 eecf8c00 00061a80 eecf8c00 c075a380 c075a38c
[ 3.053640] de80: 00000000 eeca4000 eecadebc eecade98 c0546334 c0545dd4 00000000 eecadea7
[ 3.053645] dea0: c075a380 eeeb0800 00000000 eecf8e58 eecadee4 eecadec0 c053da38 c0546314
[ 3.053651] dec0: eecf8e58 eec5f000 eeca4000 00000000 eeeb0800 00000000 eecadf24 eecadee8
[ 3.053656] dee0: c0049dc4 c053d7d0 eeca4000 eeca4014 eecac000 00000088 eec5f000 eeca4000
[ 3.053661] df00: eec5f018 eeca4014 eecac000 00000088 eec5f000 eeca4000 eecadf5c eecadf28
[ 3.053667] df20: c004a0e0 c0049cac eeca4164 c09c6100 00000000 00000000 eec5e1c0 eec5f000
[ 3.053672] df40: c004a094 00000000 00000000 00000000 eecadfac eecadf60 c004fc38 c004a0a0
[ 3.053677] df60: 60010a04 00000000 00008110 eec5f000 00000000 00000000 eecadf78 eecadf78
[ 3.053682] df80: 00000000 00000000 eecadf88 eecadf88 eec5e1c0 c004fb54 00000000 00000000
[ 3.053687] dfa0: 00000000 eecadfb0 c000fb88 c004fb60 00000000 00000000 00000000 00000000
[ 3.053692] dfc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
[ 3.053697] dfe0: 00000000 00000000 00000000 00000000 00000013 00000000 00000311 1800a001
[ 3.053701] Backtrace:
[ 3.053709] [<c0557a10>] (arch_counter_get_cntvct) from [<c0016ef0>] (arch_timer_read_counter_long+0x1c/0x20)
[ 3.053718] [<c0016ed4>] (arch_timer_read_counter_long) from [<c02b1338>] (__timer_delay+0x54/0x64)
[ 3.053724] [<c02b12e4>] (__timer_delay) from [<c02b1370>] (__timer_const_udelay+0x28/0x2c)
[ 3.053735] r7:066665b0 r6:c09f1274 r5:eecf8c00 r4:00000199
[ 3.053745] [<c02b1348>] (__timer_const_udelay) from [<c053acb4>] (__mmc_start_request+0x88/0xdc)
[ 3.053754] [<c053ac2c>] (__mmc_start_request) from [<c053ae00>] (mmc_start_request+0xf8/0x120)
[ 3.053766] r9:00000001 r8:00000000 r7:eecadea7 r6:eecf8c00 r5:eecf8c00 r4:eecadde8
[ 3.053775] [<c053ad08>] (mmc_start_request) from [<c053aec0>] (__mmc_start_req+0x50/0x70)
[ 3.053781] r5:eecaddf8 r4:eecadde8
[ 3.053790] [<c053ae70>] (__mmc_start_req) from [<c053b470>] (mmc_wait_for_cmd+0x60/0x8c)
[ 3.053799] r7:eecadea7 r6:00000000 r5:eecf8c00 r4:eecade34
[ 3.053809] [<c053b410>] (mmc_wait_for_cmd) from [<c0545e64>] (mmc_io_rw_direct_host+0x9c/0x138)
[ 3.053816] r6:eecf8c00 r5:00000c00 r4:00000c00
[ 3.053825] [<c0545dc8>] (mmc_io_rw_direct_host) from [<c0546334>] (sdio_reset+0x2c/0x64)
[ 3.053836] r10:eeca4000 r9:00000000 r8:c075a38c r7:c075a380 r6:eecf8c00 r5:00061a80
[ 3.053839] r4:eecf8c00
[ 3.053847] [<c0546308>] (sdio_reset) from [<c053da38>] (mmc_rescan+0x274/0x318)
[ 3.053851] r4:eecf8e58
[ 3.053859] [<c053d7c4>] (mmc_rescan) from [<c0049dc4>] (process_one_work+0x124/0x3f4)
[ 3.053870] r9:00000000 r8:eeeb0800 r7:00000000 r6:eeca4000 r5:eec5f000 r4:eecf8e58
[ 3.053879] [<c0049ca0>] (process_one_work) from [<c004a0e0>] (worker_thread+0x4c/0x524)
[ 3.053890] r10:eeca4000 r9:eec5f000 r8:00000088 r7:eecac000 r6:eeca4014 r5:eec5f018
[ 3.053893] r4:eeca4000
[ 3.053901] [<c004a094>] (worker_thread) from [<c004fc38>] (kthread+0xe4/0xfc)
[ 3.053913] r10:00000000 r9:00000000 r8:00000000 r7:c004a094 r6:eec5f000 r5:eec5e1c0
[ 3.053916] r4:00000000
[ 3.053925] [<c004fb54>] (kthread) from [<c000fb88>] (ret_from_fork+0x14/0x2c)
[ 3.053933] r7:00000000 r6:00000000 r5:c004fb54 r4:eec5e1c0
[ 3.053939] Code: e1a0c00d e92dd800 e24cb004 f57ff06f (ec510f1e)
[ 3.053956] ---[ end trace 49f19b15200d07a3 ]---
/*
* Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/dts-v1/;
#include "dra74x.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/clk/ti-dra7-atl.h>
#include <dt-bindings/input/input.h>
/ {
model = "TI DRA742";
compatible = "ti,dra7-evm", "ti,dra742", "ti,dra74", "ti,dra7";
memory {
device_type = "memory";
reg = <0x0 0x80000000 0x0 0x60000000>; /* 1536 MB */
};
reserved_mem: reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
ipu2_cma_pool: ipu2_cma@95800000 {
compatible = "shared-dma-pool";
reg = <0x0 0x95800000 0x0 0x3800000>;
reusable;
status = "okay";
};
dsp1_cma_pool: dsp1_cma@99000000 {
compatible = "shared-dma-pool";
reg = <0x0 0x99000000 0x0 0x4000000>;
reusable;
status = "okay";
};
ipu1_cma_pool: ipu1_cma@9d000000 {
compatible = "shared-dma-pool";
reg = <0x0 0x9d000000 0x0 0x2000000>;
reusable;
status = "okay";
};
dsp2_cma_pool: dsp2_cma@9f000000 {
compatible = "shared-dma-pool";
reg = <0x0 0x9f000000 0x0 0x800000>;
reusable;
status = "okay";
};
};
aliases {
display0 = &hdmi0;
display1 = &fpd_disp;
sound0 = &snd0;
sound1 = &hdmi;
i2c7 = &disp_ser;
};
evm_3v3_sd: fixedregulator-sd {
compatible = "regulator-fixed";
regulator-name = "evm_3v3_sd";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
enable-active-high;
gpio = <&pcf_gpio_21 5 GPIO_ACTIVE_HIGH>;
};
evm_3v3_sw: fixedregulator-evm_3v3_sw {
compatible = "regulator-fixed";
regulator-name = "evm_3v3_sw";
vin-supply = <&sysen1>;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
aic_dvdd: fixedregulator-aic_dvdd {
/* TPS77018DBVT */
compatible = "regulator-fixed";
regulator-name = "aic_dvdd";
vin-supply = <&evm_3v3_sw>;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
vmmcwl_fixed: fixedregulator-mmcwl {
compatible = "regulator-fixed";
regulator-name = "vmmcwl_fixed";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
gpio = <&gpio5 8 0>; /* gpio5_8 */
startup-delay-us = <70000>;
enable-active-high;
};
extcon_usb1: extcon_usb1 {
compatible = "linux,extcon-usb-gpio";
id-gpio = <&pcf_gpio_21 1 GPIO_ACTIVE_HIGH>;
};
extcon_usb2: extcon_usb2 {
compatible = "linux,extcon-usb-gpio";
id-gpio = <&pcf_gpio_21 2 GPIO_ACTIVE_HIGH>;
};
vtt_fixed: fixedregulator-vtt {
compatible = "regulator-fixed";
regulator-name = "vtt_fixed";
regulator-min-microvolt = <1350000>;
regulator-max-microvolt = <1350000>;
regulator-always-on;
regulator-boot-on;
enable-active-high;
vin-supply = <&sysen2>;
gpio = <&gpio7 11 GPIO_ACTIVE_HIGH>;
};
snd0: sound@0 {
compatible = "simple-audio-card";
simple-audio-card,name = "DRA7xx-EVM";
simple-audio-card,widgets =
"Headphone", "Headphone Jack",
"Line", "Line Out",
"Microphone", "Mic Jack",
"Line", "Line In";
simple-audio-card,routing =
"Headphone Jack", "HPLOUT",
"Headphone Jack", "HPROUT",
"Line Out", "LLOUT",
"Line Out", "RLOUT",
"MIC3L", "Mic Jack",
"MIC3R", "Mic Jack",
"Mic Jack", "Mic Bias",
"LINE1L", "Line In",
"LINE1R", "Line In";
simple-audio-card,format = "dsp_b";
simple-audio-card,bitclock-master = <&sound0_master>;
simple-audio-card,frame-master = <&sound0_master>;
simple-audio-card,bitclock-inversion;
sound0_master: simple-audio-card,cpu {
sound-dai = <&mcasp3>;
system-clock-frequency = <11289600>;
};
simple-audio-card,codec {
sound-dai = <&tlv320aic3106>;
clocks = <&atl_clkin2_ck>;
};
};
leds {
compatible = "gpio-leds";
led@0 {
label = "dra7:usr1";
gpios = <&pcf_lcd 4 GPIO_ACTIVE_LOW>;
default-state = "off";
};
led@1 {
label = "dra7:usr2";
gpios = <&pcf_lcd 5 GPIO_ACTIVE_LOW>;
default-state = "off";
};
led@2 {
label = "dra7:usr3";
gpios = <&pcf_lcd 6 GPIO_ACTIVE_LOW>;
default-state = "off";
};
led@3 {
label = "dra7:usr4";
gpios = <&pcf_lcd 7 GPIO_ACTIVE_LOW>;
default-state = "off";
};
};
gpio_keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
autorepeat;
USER1 {
label = "btnUser1";
linux,code = <BTN_0>;
gpios = <&pcf_lcd 2 GPIO_ACTIVE_LOW>;
};
USER2 {
label = "btnUser2";
linux,code = <BTN_1>;
gpios = <&pcf_lcd 3 GPIO_ACTIVE_LOW>;
};
};
hdmi0: connector@1 {
compatible = "hdmi-connector";
label = "hdmi";
type = "a";
port {
hdmi_connector_in: endpoint {
remote-endpoint = <&tpd12s015_out>;
};
};
};
tpd12s015: encoder@1 {
compatible = "ti,dra7evm-tpd12s015";
pinctrl-names = "i2c", "ddc";
pinctrl-0 = <&hdmi_i2c_sel_pin &hdmi_i2c_pins_i2c>;
pinctrl-1 = <&hdmi_i2c_sel_pin &hdmi_i2c_pins_ddc>;
ddc-i2c-bus = <&i2c2>;
mcasp-gpio = <&mcasp8>;
gpios = <&pcf_hdmi 4 0>, /* P4, CT CP HPD */
<&pcf_hdmi 5 0>, /* P5, LS OE */
<&gpio7 12 0>; /* gpio7_12/sp1_cs2, HPD */
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
tpd12s015_in: endpoint@0 {
remote-endpoint = <&hdmi_out>;
};
};
port@1 {
reg = <1>;
tpd12s015_out: endpoint@0 {
remote-endpoint = <&hdmi_connector_in>;
};
};
};
};
};
&dra7_pmx_core {
dcan1_pins_default: dcan1_pins_default {
pinctrl-single,pins = <
0x3d0 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* dcan1_tx */
0x418 (PULL_UP | MUX_MODE1) /* wakeup0.dcan1_rx */
>;
};
dcan1_pins_sleep: dcan1_pins_sleep {
pinctrl-single,pins = <
0x3d0 (MUX_MODE15 | PULL_UP) /* dcan1_tx.off */
0x418 (MUX_MODE15 | PULL_UP) /* wakeup0.off */
>;
};
hdmi_i2c_sel_pin: pinmux_hdmi_i2c_sel_pin {
pinctrl-single,pins = <
/* this pin is used as a GPIO via mcasp */
0x2fc (PIN_OUTPUT | MUX_MODE1) /* mcasp8_axr2 */
>;
};
hdmi_i2c_pins_i2c: pinmux_hdmi_i2c_pins_default {
pinctrl-single,pins = <
0x408 (PIN_INPUT | MUX_MODE0) /* i2c2_sda.i2c2_sda */
0x40c (PIN_INPUT | MUX_MODE0) /* i2c2_scl.i2c2_scl */
>;
};
hdmi_i2c_pins_ddc: pinmux_hdmi_i2c_pins_ddc {
pinctrl-single,pins = <
0x408 (PIN_INPUT | MUX_MODE1) /* i2c2_sda.hdmi1_ddc_scl */
0x40c (PIN_INPUT | MUX_MODE1) /* i2c2_scl.hdmi1_ddc_sda */
>;
};
mmc1_pins_default: pinmux_mmc1_default_pins {
pinctrl-single,pins = <
0x354 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */
0x358 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */
0x35c (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */
0x360 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */
0x364 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */
0x368 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */
>;
};
mmc1_pins_sdr12: pinmux_mmc1_sdr12_pins {
pinctrl-single,pins = <
0x354 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */
0x358 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */
0x35c (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */
0x360 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */
0x364 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */
0x368 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */
>;
};
mmc1_pins_hs: pinmux_mmc1_hs_pins {
pinctrl-single,pins = <
0x354 (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_clk.clk */
0x358 (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_cmd.cmd */
0x35c (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_dat0.dat0 */
0x360 (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_dat1.dat1 */
0x364 (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_dat2.dat2 */
0x368 (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_dat3.dat3 */
>;
};
mmc1_pins_sdr25: pinmux_mmc1_sdr25_pins {
pinctrl-single,pins = <
0x354 (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_clk.clk */
0x358 (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_cmd.cmd */
0x35c (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_dat0.dat0 */
0x360 (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_dat1.dat1 */
0x364 (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_dat2.dat2 */
0x368 (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_dat3.dat3 */
>;
};
mmc1_pins_sdr50: pinmux_mmc1_sdr50_pins {
pinctrl-single,pins = <
0x354 (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE10 | MUX_MODE0) /* mmc1_clk.clk */
0x358 (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE10 | MUX_MODE0) /* mmc1_cmd.cmd */
0x35c (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE10 | MUX_MODE0) /* mmc1_dat0.dat0 */
0x360 (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE10 | MUX_MODE0) /* mmc1_dat1.dat1 */
0x364 (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE10 | MUX_MODE0) /* mmc1_dat2.dat2 */
0x368 (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE10 | MUX_MODE0) /* mmc1_dat3.dat3 */
>;
};
mmc1_pins_ddr50: pinmux_mmc1_ddr50_pins {
pinctrl-single,pins = <
0x354 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc1_clk.clk */
0x358 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc1_cmd.cmd */
0x35c (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc1_dat0.dat0 */
0x360 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc1_dat1.dat1 */
0x364 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc1_dat2.dat2 */
0x368 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc1_dat3.dat3 */
>;
};
mmc1_pins_sdr104: pinmux_mmc1_sdr104_pins {
pinctrl-single,pins = <
0x354 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc1_clk.clk */
0x358 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc1_cmd.cmd */
0x35c (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc1_dat0.dat0 */
0x360 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc1_dat1.dat1 */
0x364 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc1_dat2.dat2 */
0x368 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc1_dat3.dat3 */
>;
};
mmc2_pins_default: mmc2_pins_default {
pinctrl-single,pins = <
0x9c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a23.mmc2_clk */
0xb0 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */
0xa0 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */
0xa4 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */
0xa8 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */
0xac (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */
0x8c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */
0x90 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */
0x94 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */
0x98 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */
>;
};
mmc2_pins_hs: mmc2_pins_hs {
pinctrl-single,pins = <
0x9c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a23.mmc2_clk */
0xb0 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */
0xa0 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */
0xa4 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */
0xa8 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */
0xac (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */
0x8c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */
0x90 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */
0x94 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */
0x98 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */
>;
};
mmc2_pins_ddr_1_8v: pinmux_mmc2_ddr_1_8v_pins {
pinctrl-single,pins = <
0x9c (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_a23.mmc2_clk */
0xb0 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */
0xa0 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */
0xa4 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */
0xa8 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */
0xac (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */
0x8c (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */
0x90 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */
0x94 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */
0x98 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */
>;
};
mmc2_pins_hs200_1_8v: mmc2_pins_hs200_1_8v {
pinctrl-single,pins = <
0x9c (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_a23.mmc2_clk */
0xb0 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */
0xa0 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */
0xa4 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */
0xa8 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */
0xac (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */
0x8c (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */
0x90 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */
0x94 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */
0x98 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */
>;
};
mmc4_pins_default: mmc4_pins_default {
pinctrl-single,pins = <
0x3e8 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE3) /* uart1_ctsn.mmc4_clk */
0x3ec (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE3) /* uart1_rtsn.mmc4_cmd */
0x3f0 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE3) /* uart2_rxd.mmc4_dat0 */
0x3f4 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE3) /* uart2_txd.mmc4_dat1 */
0x3f8 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE3) /* uart2_ctsn.mmc4_dat2 */
0x3fC (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE3) /* uart2_rtsn.mmc4_dat3 */
>;
};
mmc4_pins_hs: mmc4_pins_hs {
pinctrl-single,pins = <
0x3e8 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE3) /* uart1_ctsn.mmc4_clk */
0x3ec (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE3) /* uart1_rtsn.mmc4_cmd */
0x3f0 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE3) /* uart2_rxd.mmc4_dat0 */
0x3f4 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE3) /* uart2_txd.mmc4_dat1 */
0x3f8 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE3) /* uart2_ctsn.mmc4_dat2 */
0x3fC (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE3) /* uart2_rtsn.mmc4_dat3 */
>;
};
mmc4_pins_sdr12: mmc4_pins_sdr12 {
pinctrl-single,pins = <
0x3e8 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE3) /* uart1_ctsn.mmc4_clk */
0x3eC (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE3) /* uart1_rtsn.mmc4_cmd */
0x3f0 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE3) /* uart2_rxd.mmc4_dat0 */
0x3f4 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE3) /* uart2_txd.mmc4_dat1 */
0x3f8 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE3) /* uart2_ctsn.mmc4_dat2 */
0x3fc (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE3) /* uart2_rtsn.mmc4_dat3 */
>;
};
mmc4_pins_sdr25: mmc4_pins_sdr25 {
pinctrl-single,pins = <
0x3e8 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE3) /* uart1_ctsn.mmc4_clk */
0x3eC (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE3) /* uart1_rtsn.mmc4_cmd */
0x3f0 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE3) /* uart2_rxd.mmc4_dat0 */
0x3f4 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE3) /* uart2_txd.mmc4_dat1 */
0x3f8 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE3) /* uart2_ctsn.mmc4_dat2 */
0x3fc (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE3) /* uart2_rtsn.mmc4_dat3 */
>;
};
};
&dra7_iodelay_core {
uart3_pins_default: pinmux_uart3_pins {
pinctrl-single,pins = <
0x34c (PIN_INPUT | MUX_MODE4) /* mcasp5_axr0.uart3_rxd */
0x350 (PIN_OUTPUT | MUX_MODE4) /* mcasp5_axr1.uart3_txd */
>;
};
mmc1_iodelay_ddr50_rev11_conf: mmc1_iodelay_ddr50_rev11_conf {
pinctrl-single,pins = <
0x618 (A_DELAY(572) | G_DELAY(540)) /* CFG_MMC1_CLK_IN */
0x624 (A_DELAY(0) | G_DELAY(600)) /* CFG_MMC1_CMD_IN */
0x630 (A_DELAY(403) | G_DELAY(120)) /* CFG_MMC1_DAT0_IN */
0x63c (A_DELAY(23) | G_DELAY(60)) /* CFG_MMC1_DAT1_IN */
0x648 (A_DELAY(25) | G_DELAY(60)) /* CFG_MMC1_DAT2_IN */
0x654 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT3_IN */
0x620 (A_DELAY(1525) | G_DELAY(0)) /* CFG_MMC1_CLK_OUT */
0x628 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_CMD_OEN */
0x62c (A_DELAY(55) | G_DELAY(0)) /* CFG_MMC1_CMD_OUT */
0x634 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT0_OEN */
0x638 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT0_OUT */
0x640 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT1_OEN */
0x644 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT1_OUT */
0x64c (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT2_OEN */
0x650 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT2_OUT */
0x658 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT3_OEN */
0x65c (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT3_OUT */
>;
};
mmc1_iodelay_ddr50_rev20_conf: mmc1_iodelay_ddr50_rev20_conf {
pinctrl-single,pins = <
0x618 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_CLK_IN */
0x620 (A_DELAY(1271) | G_DELAY(0)) /* CFG_MMC1_CLK_OUT */
0x624 (A_DELAY(229) | G_DELAY(0)) /* CFG_MMC1_CMD_IN */
0x628 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_CMD_OEN */
0x62C (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_CMD_OUT */
0x630 (A_DELAY(850) | G_DELAY(0)) /* CFG_MMC1_DAT0_IN */
0x634 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT0_OEN */
0x638 (A_DELAY(20) | G_DELAY(0)) /* CFG_MMC1_DAT0_OUT */
0x63C (A_DELAY(468) | G_DELAY(0)) /* CFG_MMC1_DAT1_IN */
0x640 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT1_OEN */
0x644 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT1_OUT */
0x648 (A_DELAY(466) | G_DELAY(0)) /* CFG_MMC1_DAT2_IN */
0x64C (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT2_OEN */
0x650 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT2_OUT */
0x654 (A_DELAY(399) | G_DELAY(0)) /* CFG_MMC1_DAT3_IN */
0x658 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT3_OEN */
0x65C (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT3_OUT */
>;
};
mmc1_iodelay_sdr104_rev11_conf: mmc1_iodelay_sdr104_rev11_conf {
pinctrl-single,pins = <
0x620 (A_DELAY(1063) | G_DELAY(17)) /* CFG_MMC1_CLK_OUT */
0x628 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_CMD_OEN */
0x62c (A_DELAY(23) | G_DELAY(0)) /* CFG_MMC1_CMD_OUT */
0x634 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT0_OEN */
0x638 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT0_OUT */
0x640 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT1_OEN */
0x644 (A_DELAY(2) | G_DELAY(0)) /* CFG_MMC1_DAT1_OUT */
0x64c (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT2_OEN */
0x650 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT2_OUT */
0x658 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT3_OEN */
0x65c (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT3_OUT */
>;
};
mmc1_iodelay_sdr104_rev20_conf: mmc1_iodelay_sdr104_rev20_conf {
pinctrl-single,pins = <
0x620 (A_DELAY(600) | G_DELAY(400)) /* CFG_MMC1_CLK_OUT */
0x628 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_CMD_OEN */
0x62c (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_CMD_OUT */
0x634 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT0_OEN */
0x638 (A_DELAY(30) | G_DELAY(0)) /* CFG_MMC1_DAT0_OUT */
0x640 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT1_OEN */
0x644 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT1_OUT */
0x64c (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT2_OEN */
0x650 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT2_OUT */
0x658 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT3_OEN */
0x65c (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT3_OUT */
>;
};
mmc2_iodelay_hs200_1_8v_rev11_conf: mmc2_iodelay_hs200_1_8v_rev11_conf {
pinctrl-single,pins = <
0x190 (A_DELAY(621) | G_DELAY(600)) /* CFG_GPMC_A19_OEN */
0x194 (A_DELAY(300) | G_DELAY(0)) /* CFG_GPMC_A19_OUT */
0x1a8 (A_DELAY(739) | G_DELAY(600)) /* CFG_GPMC_A20_OEN */
0x1ac (A_DELAY(240) | G_DELAY(0)) /* CFG_GPMC_A20_OUT */
0x1b4 (A_DELAY(812) | G_DELAY(600)) /* CFG_GPMC_A21_OEN */
0x1b8 (A_DELAY(240) | G_DELAY(0)) /* CFG_GPMC_A21_OUT */
0x1c0 (A_DELAY(954) | G_DELAY(600)) /* CFG_GPMC_A22_OEN */
0x1c4 (A_DELAY(60) | G_DELAY(0)) /* CFG_GPMC_A22_OUT */
0x1d0 (A_DELAY(1340)| G_DELAY(420)) /* CFG_GPMC_A23_OUT */
0x1d8 (A_DELAY(935) | G_DELAY(600)) /* CFG_GPMC_A24_OEN */
0x1dc (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A24_OUT */
0x1e4 (A_DELAY(525) | G_DELAY(600)) /* CFG_GPMC_A25_OEN */
0x1e8 (A_DELAY(120) | G_DELAY(0)) /* CFG_GPMC_A25_OUT */
0x1f0 (A_DELAY(767) | G_DELAY(600)) /* CFG_GPMC_A26_OEN */
0x1f4 (A_DELAY(225) | G_DELAY(0)) /* CFG_GPMC_A26_OUT */
0x1fc (A_DELAY(565) | G_DELAY(600)) /* CFG_GPMC_A27_OEN */
0x200 (A_DELAY(60) | G_DELAY(0)) /* CFG_GPMC_A27_OUT */
0x364 (A_DELAY(969) | G_DELAY(600)) /* CFG_GPMC_CS1_OEN */
0x368 (A_DELAY(180) | G_DELAY(0)) /* CFG_GPMC_CS1_OUT */
>;
};
mmc2_iodelay_hs200_1_8v_rev20_conf: mmc2_iodelay_hs200_1_8v_rev20_conf {
pinctrl-single,pins = <
0x190 (A_DELAY(274) | G_DELAY(0)) /* CFG_GPMC_A19_OEN */
0x194 (A_DELAY(162) | G_DELAY(0)) /* CFG_GPMC_A19_OUT */
0x1a8 (A_DELAY(401) | G_DELAY(0)) /* CFG_GPMC_A20_OEN */
0x1ac (A_DELAY(73) | G_DELAY(0)) /* CFG_GPMC_A20_OUT */
0x1b4 (A_DELAY(465) | G_DELAY(0)) /* CFG_GPMC_A21_OEN */
0x1b8 (A_DELAY(115) | G_DELAY(0)) /* CFG_GPMC_A21_OUT */
0x1c0 (A_DELAY(633) | G_DELAY(0)) /* CFG_GPMC_A22_OEN */
0x1c4 (A_DELAY(47) | G_DELAY(0)) /* CFG_GPMC_A22_OUT */
0x1d0 (A_DELAY(935) | G_DELAY(280)) /* CFG_GPMC_A23_OUT */
0x1d8 (A_DELAY(621) | G_DELAY(0)) /* CFG_GPMC_A24_OEN */
0x1dc (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A24_OUT */
0x1e4 (A_DELAY(183) | G_DELAY(0)) /* CFG_GPMC_A25_OEN */
0x1e8 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A25_OUT */
0x1f0 (A_DELAY(467) | G_DELAY(0)) /* CFG_GPMC_A26_OEN */
0x1f4 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A26_OUT */
0x1fc (A_DELAY(262) | G_DELAY(0)) /* CFG_GPMC_A27_OEN */
0x200 (A_DELAY(46) | G_DELAY(0)) /* CFG_GPMC_A27_OUT */
0x364 (A_DELAY(684) | G_DELAY(0)) /* CFG_GPMC_CS1_OEN */
0x368 (A_DELAY(76) | G_DELAY(0)) /* CFG_GPMC_CS1_OUT */
>;
};
mmc2_iodelay_ddr_1_8v_rev11_conf: mmc2_iodelay_ddr_1_8v_rev11_conf {
pinctrl-single,pins = <
0x18c (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A19_IN */
0x1a4 (A_DELAY(274) | G_DELAY(240)) /* CFG_GPMC_A20_IN */
0x1b0 (A_DELAY(0) | G_DELAY(60)) /* CFG_GPMC_A21_IN */
0x1bc (A_DELAY(0) | G_DELAY(60)) /* CFG_GPMC_A22_IN */
0x1c8 (A_DELAY(514) | G_DELAY(360)) /* CFG_GPMC_A23_IN */
0x1d4 (A_DELAY(187) | G_DELAY(120)) /* CFG_GPMC_A24_IN */
0x1e0 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A25_IN */
0x1ec (A_DELAY(0) | G_DELAY(60)) /* CFG_GPMC_A26_IN */
0x1f8 (A_DELAY(121) | G_DELAY(60)) /* CFG_GPMC_A27_IN */
0x360 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_CS1_IN */
0x190 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A19_OEN */
0x194 (A_DELAY(174) | G_DELAY(0)) /* CFG_GPMC_A19_OUT */
0x1a8 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A20_OEN */
0x1ac (A_DELAY(168) | G_DELAY(0)) /* CFG_GPMC_A20_OUT */
0x1b4 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A21_OEN */
0x1b8 (A_DELAY(136) | G_DELAY(0)) /* CFG_GPMC_A21_OUT */
0x1c0 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A22_OEN */
0x1c4 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A22_OUT */
0x1d0 (A_DELAY(879) | G_DELAY(0)) /* CFG_GPMC_A23_OUT */
0x1d8 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A24_OEN */
0x1dc (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A24_OUT */
0x1e4 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A25_OEN */
0x1e8 (A_DELAY(34) | G_DELAY(0)) /* CFG_GPMC_A25_OUT */
0x1f0 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A26_OEN */
0x1f4 (A_DELAY(120) | G_DELAY(0)) /* CFG_GPMC_A26_OUT */
0x1fc (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A27_OEN */
0x200 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A27_OUT */
0x364 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_CS1_OEN */
0x368 (A_DELAY(11) | G_DELAY(0)) /* CFG_GPMC_CS1_OUT */
>;
};
mmc2_iodelay_ddr_1_8v_rev20_conf: mmc2_iodelay_ddr_1_8v_rev20_conf {
pinctrl-single,pins = <
0x18c (A_DELAY(270) | G_DELAY(0)) /* CFG_GPMC_A19_IN */
0x1a4 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A20_IN */
0x1b0 (A_DELAY(170) | G_DELAY(0)) /* CFG_GPMC_A21_IN */
0x1bc (A_DELAY(758) | G_DELAY(0)) /* CFG_GPMC_A22_IN */
0x1c8 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A23_IN */
0x1d4 (A_DELAY(81) | G_DELAY(0)) /* CFG_GPMC_A24_IN */
0x1e0 (A_DELAY(286) | G_DELAY(0)) /* CFG_GPMC_A25_IN */
0x1ec (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A26_IN */
0x1f8 (A_DELAY(123) | G_DELAY(0)) /* CFG_GPMC_A27_IN */
0x360 (A_DELAY(346) | G_DELAY(0)) /* CFG_GPMC_CS1_IN */
0x190 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A19_OEN */
0x194 (A_DELAY(55) | G_DELAY(0)) /* CFG_GPMC_A19_OUT */
0x1a8 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A20_OEN */
0x1ac (A_DELAY(422) | G_DELAY(0)) /* CFG_GPMC_A20_OUT */
0x1b4 (A_DELAY(642) | G_DELAY(0)) /* CFG_GPMC_A21_OEN */
0x1b8 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A21_OUT */
0x1c0 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A22_OEN */
0x1c4 (A_DELAY(128) | G_DELAY(0)) /* CFG_GPMC_A22_OUT */
0x1d0 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A23_OUT */
0x1d8 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A24_OEN */
0x1dc (A_DELAY(395) | G_DELAY(0)) /* CFG_GPMC_A24_OUT */
0x1e4 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A25_OEN */
0x1e8 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A25_OUT */
0x1f0 (A_DELAY(623) | G_DELAY(0)) /* CFG_GPMC_A26_OEN */
0x1f4 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A26_OUT */
0x1fc (A_DELAY(54) | G_DELAY(0)) /* CFG_GPMC_A27_OEN */
0x200 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A27_OUT */
0x364 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_CS1_OEN */
0x368 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_CS1_OUT */
>;
};
mmc4_iodelay_ds_rev11_conf: mmc4_iodelay_ds_rev11_conf {
pinctrl-single,pins = <
0x840 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART1_CTSN_IN */
0x848 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART1_CTSN_OUT */
0x84c (A_DELAY(96) | G_DELAY(0)) /* CFG_UART1_RTSN_IN */
0x850 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART1_RTSN_OEN */
0x854 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART1_RTSN_OUT */
0x870 (A_DELAY(582) | G_DELAY(0)) /* CFG_UART2_CTSN_IN */
0x874 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_CTSN_OEN */
0x878 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_CTSN_OUT */
0x87c (A_DELAY(391) | G_DELAY(0)) /* CFG_UART2_RTSN_IN */
0x880 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_RTSN_OEN */
0x884 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_RTSN_OUT */
0x888 (A_DELAY(561) | G_DELAY(0)) /* CFG_UART2_RXD_IN */
0x88c (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_RXD_OEN */
0x890 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_RXD_OUT */
0x894 (A_DELAY(588) | G_DELAY(0)) /* CFG_UART2_TXD_IN */
0x898 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_TXD_OEN */
0x89c (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_TXD_OUT */
>;
};
mmc4_iodelay_ds_rev20_conf: mmc4_iodelay_ds_rev20_conf {
pinctrl-single,pins = <
0x840 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART1_CTSN_IN */
0x848 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART1_CTSN_OUT */
0x84c (A_DELAY(307) | G_DELAY(0)) /* CFG_UART1_RTSN_IN */
0x850 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART1_RTSN_OEN */
0x854 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART1_RTSN_OUT */
0x870 (A_DELAY(785) | G_DELAY(0)) /* CFG_UART2_CTSN_IN */
0x874 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_CTSN_OEN */
0x878 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_CTSN_OUT */
0x87c (A_DELAY(613) | G_DELAY(0)) /* CFG_UART2_RTSN_IN */
0x880 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_RTSN_OEN */
0x884 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_RTSN_OUT */
0x888 (A_DELAY(683) | G_DELAY(0)) /* CFG_UART2_RXD_IN */
0x88c (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_RXD_OEN */
0x890 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_RXD_OUT */
0x894 (A_DELAY(835) | G_DELAY(0)) /* CFG_UART2_TXD_IN */
0x898 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_TXD_OEN */
0x89c (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_TXD_OUT */
>;
};
mmc4_iodelay_sdr12_hs_sdr25_rev11_conf: mmc4_iodelay_sdr12_hs_sdr25_rev11_conf {
pinctrl-single,pins = <
0x840 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART1_CTSN_IN */
0x848 (A_DELAY(2651) | G_DELAY(0)) /* CFG_UART1_CTSN_OUT */
0x84c (A_DELAY(1572) | G_DELAY(0)) /* CFG_UART1_RTSN_IN */
0x850 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART1_RTSN_OEN */
0x854 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART1_RTSN_OUT */
0x870 (A_DELAY(1913) | G_DELAY(0)) /* CFG_UART2_CTSN_IN */
0x874 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_CTSN_OEN */
0x878 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_CTSN_OUT */
0x87c (A_DELAY(1721) | G_DELAY(0)) /* CFG_UART2_RTSN_IN */
0x880 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_RTSN_OEN */
0x884 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_RTSN_OUT */
0x888 (A_DELAY(1891) | G_DELAY(0)) /* CFG_UART2_RXD_IN */
0x88c (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_RXD_OEN */
0x890 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_RXD_OUT */
0x894 (A_DELAY(1919) | G_DELAY(0)) /* CFG_UART2_TXD_IN */
0x898 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_TXD_OEN */
0x89c (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_TXD_OUT */
>;
};
mmc4_iodelay_sdr12_hs_sdr25_rev20_conf: mmc4_iodelay_sdr12_hs_sdr25_rev20_conf {
pinctrl-single,pins = <
0x840 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART1_CTSN_IN */
0x848 (A_DELAY(1147) | G_DELAY(0)) /* CFG_UART1_CTSN_OUT */
0x84c (A_DELAY(1834) | G_DELAY(0)) /* CFG_UART1_RTSN_IN */
0x850 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART1_RTSN_OEN */
0x854 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART1_RTSN_OUT */
0x870 (A_DELAY(2165) | G_DELAY(0)) /* CFG_UART2_CTSN_IN */
0x874 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_CTSN_OEN */
0x878 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_CTSN_OUT */
0x87c (A_DELAY(1929) | G_DELAY(64)) /* CFG_UART2_RTSN_IN */
0x880 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_RTSN_OEN */
0x884 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_RTSN_OUT */
0x888 (A_DELAY(1935) | G_DELAY(128)) /* CFG_UART2_RXD_IN */
0x88c (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_RXD_OEN */
0x890 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_RXD_OUT */
0x894 (A_DELAY(2172) | G_DELAY(44)) /* CFG_UART2_TXD_IN */
0x898 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_TXD_OEN */
0x89c (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_TXD_OUT */
>;
};
};
&i2c1 {
status = "okay";
clock-frequency = <400000>;
tps659038: tps659038@58 {
compatible = "ti,tps659038";
reg = <0x58>;
tps659038_pmic {
compatible = "ti,tps659038-pmic";
regulators {
smps123_reg: smps123 {
/* VDD_MPU */
regulator-name = "smps123";
regulator-min-microvolt = < 850000>;
regulator-max-microvolt = <1250000>;
regulator-always-on;
regulator-boot-on;
};
smps45_reg: smps45 {
/* VDD_DSPEVE */
regulator-name = "smps45";
regulator-min-microvolt = < 850000>;
regulator-max-microvolt = <1250000>;
regulator-always-on;
regulator-boot-on;
};
smps6_reg: smps6 {
/* VDD_GPU - over VDD_SMPS6 */
regulator-name = "smps6";
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <1250000>;
regulator-always-on;
regulator-boot-on;
};
smps7_reg: smps7 {
/* CORE_VDD */
regulator-name = "smps7";
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <1150000>;
regulator-always-on;
regulator-boot-on;
};
smps8_reg: smps8 {
/* VDD_IVAHD */
regulator-name = "smps8";
regulator-min-microvolt = < 850000>;
regulator-max-microvolt = <1250000>;
regulator-always-on;
regulator-boot-on;
};
smps9_reg: smps9 {
/* VDDS1V8 */
regulator-name = "smps9";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
};
ldo1_reg: ldo1 {
/* LDO1_OUT --> SDIO */
regulator-name = "ldo1";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
};
ldo2_reg: ldo2 {
/* VDD_RTCIO */
/* LDO2 -> VDDSHV5, LDO2 also goes to CAN_PHY_3V3 */
regulator-name = "ldo2";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
};
ldo3_reg: ldo3 {
/* VDDA_1V8_PHY */
regulator-name = "ldo3";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
};
ldo9_reg: ldo9 {
/* VDD_RTC */
regulator-name = "ldo9";
regulator-min-microvolt = <1050000>;
regulator-max-microvolt = <1050000>;
regulator-always-on;
regulator-boot-on;
regulator-allow-bypass;
};
ldoln_reg: ldoln {
/* VDDA_1V8_PLL */
regulator-name = "ldoln";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
};
ldousb_reg: ldousb {
/* VDDA_3V_USB: VDDA_USBHS33 */
regulator-name = "ldousb";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
};
/* REGEN1 is unused */
regen2: regen2 {
/* Needed for PMIC internal resources */
regulator-name = "regen2";
regulator-boot-on;
regulator-always-on;
};
/* REGEN3 is unused */
sysen1: sysen1 {
/* PMIC_REGEN_3V3 */
regulator-name = "sysen1";
regulator-boot-on;
regulator-always-on;
};
sysen2: sysen2 {
/* PMIC_REGEN_DDR */
regulator-name = "sysen2";
regulator-boot-on;
regulator-always-on;
};
};
};
};
pcf_lcd: gpio@20 {
compatible = "nxp,pcf8575";
reg = <0x20>;
gpio-controller;
#gpio-cells = <2>;
interrupt-parent = <&gpio6>;
interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
interrupt-controller;
#interrupt-cells = <2>;
};
pcf_gpio_21: gpio@21 {
compatible = "ti,pcf8575";
reg = <0x21>;
lines-initial-states = <0x1408>;
gpio-controller;
#gpio-cells = <2>;
interrupt-parent = <&gpio6>;
interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
interrupt-controller;
#interrupt-cells = <2>;
};
tlv320aic3106: tlv320aic3106@19 {
#sound-dai-cells = <0>;
compatible = "ti,tlv320aic3106";
reg = <0x19>;
adc-settle-ms = <40>;
ai3x-micbias-vg = <1>; /* 2.0V */
status = "okay";
/* Regulators */
AVDD-supply = <&evm_3v3_sw>;
IOVDD-supply = <&evm_3v3_sw>;
DRVDD-supply = <&evm_3v3_sw>;
DVDD-supply = <&aic_dvdd>;
};
};
i2c_p3_exp: &i2c2 {
status = "okay";
clock-frequency = <400000>;
pcf_hdmi: gpio@26 {
compatible = "nxp,pcf8575";
reg = <0x26>;
gpio-controller;
#gpio-cells = <2>;
p1 {
/* vin6_sel_s0: high: VIN6, low: audio */
gpio-hog;
gpios = <1 GPIO_ACTIVE_HIGH>;
output-low;
line-name = "vin6_sel_s0";
};
};
ov10633@37 {
compatible = "ovti,ov10633";
reg = <0x37>;
mux-gpios = <&pcf_hdmi 3 GPIO_ACTIVE_LOW>; /* CAM_FPD_MUX_S0 */
port {
onboardLI: endpoint {
remote-endpoint = <&vin1a>;
hsync-active = <1>;
vsync-active = <1>;
pclk-sample = <0>;
};
};
};
disp_ser: serializer@1b {
compatible = "ti,ds90uh925q";
reg = <0x1b>;
#address-cells = <1>;
#size-cells = <0>;
ranges = <0x2c 0x2c>,
<0x1c 0x1c>;
disp_des: deserializer@2c {
compatible = "ti,ds90uh928q";
reg = <0x2c>;
slave-mode;
};
/* TLC chip for LCD panel power and backlight */
fpd_disp: tlc59108@1c {
status = "disabled";
reg = <0x1c>;
compatible = "ti,tlc59108-fpddisp";
enable-gpios = <&pcf_gpio_21 0 GPIO_ACTIVE_LOW>;
/* P0, SEL_GPMC_AD_VID_S0 */
port@lcd3 {
fpd_in: endpoint {
remote-endpoint = <&dpi_out3>;
};
};
};
};
};
&i2c3 {
status = "okay";
clock-frequency = <400000>;
};
&mcspi1 {
status = "okay";
};
&mcspi2 {
status = "okay";
};
&uart1 {
status = "disabled";
};
&uart2 {
status = "okay";
};
&uart3 {
status = "okay";
/* gpios = <&pcf_gpio_21 14 GPIO_ACTIVE_LOW>; */
pinctrl-names = "default";
pinctrl-0 = <&uart3_pins_default>;
};
&mmc1 {
status = "okay";
vmmc-supply = <&evm_3v3_sd>;
vmmc_aux-supply = <&ldo1_reg>;
bus-width = <4>;
/*
* SDCD signal is not being used here - using the fact that GPIO mode
* is always hardwired.
*/
cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW>;
max-frequency = <192000000>;
pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50-rev11", "sdr104-rev11", "ddr50", "sdr104";
pinctrl-0 = <&mmc1_pins_default>;
pinctrl-1 = <&mmc1_pins_hs>;
pinctrl-2 = <&mmc1_pins_sdr12>;
pinctrl-3 = <&mmc1_pins_sdr25>;
pinctrl-4 = <&mmc1_pins_sdr50>;
pinctrl-5 = <&mmc1_pins_ddr50 &mmc1_iodelay_ddr50_rev11_conf>;
pinctrl-6 = <&mmc1_pins_sdr104 &mmc1_iodelay_sdr104_rev11_conf>;
pinctrl-7 = <&mmc1_pins_ddr50 &mmc1_iodelay_ddr50_rev20_conf>;
pinctrl-8 = <&mmc1_pins_sdr104 &mmc1_iodelay_sdr104_rev20_conf>;
};
&mmc2 {
status = "okay";
vmmc-supply = <&evm_3v3_sw>;
bus-width = <8>;
max-frequency = <192000000>;
pinctrl-names = "default", "hs", "ddr_1_8v-rev11", "ddr_1_8v", "hs200_1_8v-rev11", "hs200_1_8v";
pinctrl-0 = <&mmc2_pins_default>;
pinctrl-1 = <&mmc2_pins_hs>;
pinctrl-2 = <&mmc2_pins_ddr_1_8v &mmc2_iodelay_ddr_1_8v_rev11_conf>;
pinctrl-3 = <&mmc2_pins_ddr_1_8v &mmc2_iodelay_ddr_1_8v_rev20_conf>;
pinctrl-4 = <&mmc2_pins_hs200_1_8v &mmc2_iodelay_hs200_1_8v_rev11_conf>;
pinctrl-5 = <&mmc2_pins_hs200_1_8v &mmc2_iodelay_hs200_1_8v_rev20_conf>;
};
&mmc4 {
status = "okay";
vmmc-supply = <&vmmcwl_fixed>;
bus-width = <4>;
cap-power-off-card;
keep-power-in-suspend;
ti,non-removable;
pinctrl-names = "default-rev11", "default", "hs-rev11", "hs", "sdr12-rev11", "sdr12", "sdr25-rev11", "sdr25";
pinctrl-0 = <&mmc4_pins_default &mmc4_iodelay_ds_rev11_conf>;
pinctrl-1 = <&mmc4_pins_default &mmc4_iodelay_ds_rev20_conf>;
pinctrl-2 = <&mmc4_pins_hs &mmc4_iodelay_sdr12_hs_sdr25_rev11_conf>;
pinctrl-3 = <&mmc4_pins_hs &mmc4_iodelay_sdr12_hs_sdr25_rev20_conf>;
pinctrl-4 = <&mmc4_pins_sdr12 &mmc4_iodelay_sdr12_hs_sdr25_rev11_conf>;
pinctrl-5 = <&mmc4_pins_sdr12 &mmc4_iodelay_sdr12_hs_sdr25_rev20_conf>;
pinctrl-6 = <&mmc4_pins_sdr25 &mmc4_iodelay_sdr12_hs_sdr25_rev11_conf>;
pinctrl-7 = <&mmc4_pins_sdr25 &mmc4_iodelay_sdr12_hs_sdr25_rev20_conf>;
#address-cells = <1>;
#size-cells = <0>;
wlcore: wlcore@0 {
compatible = "ti,wl1835";
reg = <2>;
interrupt-parent = <&gpio5>;
interrupts = <7 IRQ_TYPE_LEVEL_HIGH>;
};
};
&oppdm_mpu {
vdd-supply = <&smps123_reg>;
};
&oppdm_dspeve {
vdd-supply = <&smps45_reg>;
};
&oppdm_gpu {
vdd-supply = <&smps6_reg>;
};
&oppdm_ivahd {
vdd-supply = <&smps8_reg>;
};
&oppdm_core {
vdd-supply = <&smps7_reg>;
};
&qspi {
status = "okay";
spi-max-frequency = <64000000>;
m25p80@0 {
compatible = "s25fl256s1";
spi-max-frequency = <64000000>;
reg = <0>;
spi-tx-bus-width = <1>;
spi-rx-bus-width = <4>;
#address-cells = <1>;
#size-cells = <1>;
/* MTD partition table.
* The ROM checks the first four physical blocks
* for a valid file to boot and the flash here is
* 64KiB block size.
*/
partition@0 {
label = "QSPI.SPL";
reg = <0x00000000 0x000040000>;
};
partition@1 {
label = "QSPI.u-boot";
reg = <0x00040000 0x00100000>;
};
partition@2 {
label = "QSPI.u-boot-spl-os";
reg = <0x00140000 0x00080000>;
};
partition@3 {
label = "QSPI.u-boot-env";
reg = <0x001c0000 0x00010000>;
};
partition@4 {
label = "QSPI.u-boot-env.backup1";
reg = <0x001d0000 0x0010000>;
};
partition@5 {
label = "QSPI.kernel";
reg = <0x001e0000 0x0800000>;
};
partition@6 {
label = "QSPI.file-system";
reg = <0x009e0000 0x01620000>;
};
};
};
&omap_dwc3_1 {
extcon = <&extcon_usb1>;
};
&omap_dwc3_2 {
extcon = <&extcon_usb2>;
};
&usb1 {
dr_mode = "otg";
};
&usb2 {
dr_mode = "host";
};
&elm {
status = "okay";
};
&gpmc {
status = "okay";
ranges = <0 0 0x08000000 0x01000000>; /* minimum GPMC partition = 16MB */
nand@0,0 {
compatible = "ti,omap2-nand";
reg = <0 0 4>; /* device IO registers */
interrupt-parent = <&gpmc>;
interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
<1 IRQ_TYPE_NONE>; /* termcount */
rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 pin */
ti,nand-ecc-opt = "bch8";
ti,elm-id = <&elm>;
nand-bus-width = <16>;
gpmc,device-width = <2>;
gpmc,sync-clk-ps = <0>;
gpmc,cs-on-ns = <0>;
gpmc,cs-rd-off-ns = <80>;
gpmc,cs-wr-off-ns = <80>;
gpmc,adv-on-ns = <0>;
gpmc,adv-rd-off-ns = <60>;
gpmc,adv-wr-off-ns = <60>;
gpmc,we-on-ns = <10>;
gpmc,we-off-ns = <50>;
gpmc,oe-on-ns = <4>;
gpmc,oe-off-ns = <40>;
gpmc,access-ns = <40>;
gpmc,wr-access-ns = <80>;
gpmc,rd-cycle-ns = <80>;
gpmc,wr-cycle-ns = <80>;
gpmc,bus-turnaround-ns = <0>;
gpmc,cycle2cycle-delay-ns = <0>;
gpmc,clk-activation-ns = <0>;
gpmc,wr-data-mux-bus-ns = <0>;
/* MTD partition table */
/* All SPL-* partitions are sized to minimal length
* which can be independently programmable. For
* NAND flash this is equal to size of erase-block */
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "NAND.SPL";
reg = <0x00000000 0x000020000>;
};
partition@1 {
label = "NAND.SPL.backup1";
reg = <0x00020000 0x00020000>;
};
partition@2 {
label = "NAND.SPL.backup2";
reg = <0x00040000 0x00020000>;
};
partition@3 {
label = "NAND.SPL.backup3";
reg = <0x00060000 0x00020000>;
};
partition@4 {
label = "NAND.u-boot-spl-os";
reg = <0x00080000 0x00040000>;
};
partition@5 {
label = "NAND.u-boot";
reg = <0x000c0000 0x00100000>;
};
partition@6 {
label = "NAND.u-boot-env";
reg = <0x001c0000 0x00020000>;
};
partition@7 {
label = "NAND.u-boot-env.backup1";
reg = <0x001e0000 0x00020000>;
};
partition@8 {
label = "NAND.kernel";
reg = <0x00200000 0x00800000>;
};
partition@9 {
label = "NAND.file-system";
reg = <0x00a00000 0x0f600000>;
};
};
};
&usb2_phy1 {
phy-supply = <&ldousb_reg>;
};
&usb2_phy2 {
phy-supply = <&ldousb_reg>;
};
&gpio7 {
ti,no-reset-on-init;
ti,no-idle-on-init;
};
&mac {
status = "okay";
dual_emac;
};
&cpsw_emac0 {
phy_id = <&davinci_mdio>, <2>;
phy-mode = "rgmii";
dual_emac_res_vlan = <1>;
};
&cpsw_emac1 {
phy_id = <&davinci_mdio>, <3>;
phy-mode = "rgmii";
dual_emac_res_vlan = <2>;
};
&dcan1 {
status = "ok";
pinctrl-names = "default", "sleep", "active";
pinctrl-0 = <&dcan1_pins_sleep>;
pinctrl-1 = <&dcan1_pins_sleep>;
pinctrl-2 = <&dcan1_pins_default>;
};
&atl {
assigned-clocks = <&abe_dpll_sys_clk_mux>,
<&atl_gfclk_mux>,
<&dpll_abe_ck>,
<&dpll_abe_m2x2_ck>,
<&atl_clkin1_ck>,
<&atl_clkin2_ck>;
assigned-clock-parents = <&sys_clkin2>, <&dpll_abe_m2_ck>;
assigned-clock-rates = <0>, <0>, <180633600>, <361267200>,
<11289600>, <11289600>;
status = "okay";
atl2 {
bws = <DRA7_ATL_WS_MCASP2_FSX>;
aws = <DRA7_ATL_WS_MCASP3_FSX>;
};
};
&mcasp3 {
#sound-dai-cells = <0>;
assigned-clocks = <&mcasp3_ahclkx_mux>;
assigned-clock-parents = <&atl_clkin2_ck>;
status = "okay";
op-mode = <0>; /* MCASP_IIS_MODE */
tdm-slots = <2>;
/* 4 serializer */
serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
1 2 0 0
>;
tx-num-evt = <32>;
rx-num-evt = <32>;
};
&mcasp8 {
/* not used for audio. only the AXR2 pin is used as GPIO */
status = "okay";
};
&mailbox5 {
status = "okay";
mbox_ipu1_ipc3x: mbox_ipu1_ipc3x {
status = "okay";
};
mbox_dsp1_ipc3x: mbox_dsp1_ipc3x {
status = "okay";
};
};
&mailbox6 {
status = "okay";
mbox_ipu2_ipc3x: mbox_ipu2_ipc3x {
status = "okay";
};
mbox_dsp2_ipc3x: mbox_dsp2_ipc3x {
status = "okay";
};
};
&mmu0_dsp1 {
status = "okay";
};
&mmu1_dsp1 {
status = "okay";
};
&mmu0_dsp2 {
status = "okay";
};
&mmu1_dsp2 {
status = "okay";
};
&mmu_ipu1 {
status = "okay";
};
&mmu_ipu2 {
status = "okay";
};
&ipu2 {
status = "okay";
memory-region = <&ipu2_cma_pool>;
mboxes = <&mailbox6 &mbox_ipu2_ipc3x>;
timers = <&timer3>;
watchdog-timers = <&timer4>, <&timer9>;
};
&ipu1 {
status = "okay";
memory-region = <&ipu1_cma_pool>;
mboxes = <&mailbox5 &mbox_ipu1_ipc3x>;
timers = <&timer11>;
watchdog-timers = <&timer7>, <&timer8>;
};
&dsp1 {
status = "okay";
memory-region = <&dsp1_cma_pool>;
mboxes = <&mailbox5 &mbox_dsp1_ipc3x>;
timers = <&timer5>;
watchdog-timers = <&timer10>;
};
&dsp2 {
status = "okay";
memory-region = <&dsp2_cma_pool>;
mboxes = <&mailbox6 &mbox_dsp2_ipc3x>;
timers = <&timer6>;
};
&dss {
status = "okay";
vdda_video-supply = <&ldoln_reg>;
ports {
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
port@lcd3 {
reg = <2>;
dpi_out3: endpoint {
remote-endpoint = <&fpd_in>;
data-lines = <24>;
};
};
};
};
&hdmi {
status = "ok";
vdda-supply = <&ldo3_reg>;
port {
hdmi_out: endpoint {
remote-endpoint = <&tpd12s015_in>;
};
};
};
&vip1 {
status = "okay";
};
video_in: &vin1a {
status = "okay";
endpoint@0 {
slave-mode;
remote-endpoint = <&onboardLI>;
};
};
#include "dra7xx-jamr3.dtsi"
&tvp_5158{
mux-gpios = <&pcf_hdmi 3 GPIO_ACTIVE_HIGH>, /*CAM_FPD_MUX_S0*/
<&pcf_jamr3_21 8 GPIO_ACTIVE_LOW>; /*SEL_TVP_FPD*/
};
U-Boot SPL 2016.05 (Sep 14 2016 - 11:16:24) DRA752-GP ES2.0 MMC Device 1 not found *** Warning - No MMC card found, using default environment Trying to boot from MMC1 MMC Device 1 not found *** Warning - No MMC card found, using default environment file_fat_read:1343 reading u-boot.img do_fat_read_at:841 VFAT Support enabled FAT32, fat_sect: 32, fatlength: 977 Rootdir begins at cluster: 2, sector: 1986, offset: f8400 Data begins at: 1984 Sector size: 512, cluster size: 1 FAT read(sect=1986, cnt:1), clust_size=1, DIRENTSPERBLOCK=16 RootMismatch: |mlo|| Rootvfatname: |u-boot.img| RootName: u-boot.img, start: 0x8d73, size: 0x59d70 Size: 367984, got: 64 do_fat_read_at:1235, ret=0 file_fat_read:1343 reading u-boot.img do_fat_read_at:841 VFAT Support enabled FAT32, fat_sect: 32, fatlength: 977 Rootdir begins at cluster: 2, sector: 1986, offset: f8400 Data begins at: 1984 Sector size: 512, cluster size: 1 FAT read(sect=1986, cnt:1), clust_size=1, DIRENTSPERBLOCK=16 RootMismatch: |mlo|| Rootvfatname: |u-boot.img| RootName: u-boot.img, start: 0x8d73, size: 0x59d70 Size: 367984, got: 367984 do_fat_read_at:1235, ret=0 U-Boot 2016.05 (Sep 14 2016 - 11:16:24 +0800) CPU : DRA752-GP ES2.0 Board: DRA74x EVM REV <NULL> I2C: ready DRAM: 1.5 GiB MMC: OMAP SD/MMC: 0, OMAP SD/MMC: 1 *** Warning - bad CRC, using default environment Warning: fastboot.board_rev: unknown board revision GUID Partition Table Header signature is wrong: 0x0 != 0x5452415020494645 part_get_info_efi: *** ERROR: Invalid GPT *** GUID Partition Table Header signature is wrong: 0x0 != 0x5452415020494645 part_get_info_efi: *** ERROR: Invalid Backup GPT *** ERROR: cannot find partition: 'userdata' at arch/arm/cpu/armv7/omap-common/utils.c:195/mmc_get_part_size() Warning: fastboot.userdata_size: unable to calc SCSI: SATA link 0 timeout. AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl SATA mode flags: 64bit ncq stag pm led clo only pmp pio slum part ccc apst scanning bus for devices... Found 0 device(s). Net: <ethaddr> not set. Validating first E-fuse MAC Could not get PHY for cpsw: addr 2 cpsw Hit any key to stop autoboot: 2 1 0 J6 ... switch to partitions #0, OK mmc0 is current device SD/MMC found on device 0 fat_read_file:1357 reading boot.scr do_fat_read_at:841 VFAT Support enabled FAT32, fat_sect: 32, fatlength: 977 Rootdir begins at cluster: 2, sector: 1986, offset: f8400 Data begins at: 1984 Sector size: 512, cluster size: 1 FAT read(sect=1986, cnt:1), clust_size=1, DIRENTSPERBLOCK=16 RootMismatch: |mlo|| Rootvfatname: |u-boot.img| RootMismatch: |u-boot.img|u-boot.img| RootMismatch: |u-boot.img|| Rootvfatname: |uenv-emmc.txt| RootMismatch: |uenv-e~1.txt|uenv-emmc.txt| RootMismatch: |uenv-e~1.txt|| Rootvfatname: |uenv.txt| RootMismatch: |uenv.txt|uenv.txt| RootMismatch: |uenv.txt|| Rootvfatname: |mk-emmc-boot.sh| RootMismatch: |mk-emm~1.sh|mk-emmc-boot.sh| RootMismatch: |mk-emm~1.sh|| Rootvfatname: |j6_uenv.txt| RootMismatch: |j6_uenv.txt|j6_uenv.txt| RootMismatch: |j6_uenv.txt|| Rootvfatname: |j6e_uenv.txt| RootMismatch: |j6e_uenv.txt|j6e_uenv.txt| RootMismatch: |j6e_uenv.txt|| Rootvfatname: |u-boot-dtb.img| RootMismatch: |u-boot~1.img|u-boot-dtb.img| END LOOP: buffer_blk_cnt=0 clust_size=1 FAT read(sect=3937, cnt:1), clust_size=1, DIRENTSPERBLOCK=16 RootMismatch: |u-boot~1.img|| Rootvfatname: |rootfs.tar.bz2| RootMismatch: |rootfs~1.bz2|rootfs.tar.bz2| RootMismatch: |rootfs~1.bz2|| Rootvfatname: |zimage| RootMismatch: |zimage|zimage| RootMismatch: |zimage|| RootDentname == NULL - 7 ** Unable to read file boot.scr ** fat_read_file:1357 reading uEnv.txt do_fat_read_at:841 VFAT Support enabled FAT32, fat_sect: 32, fatlength: 977 Rootdir begins at cluster: 2, sector: 1986, offset: f8400 Data begins at: 1984 Sector size: 512, cluster size: 1 FAT read(sect=1986, cnt:1), clust_size=1, DIRENTSPERBLOCK=16 RootMismatch: |mlo|| Rootvfatname: |u-boot.img| RootMismatch: |u-boot.img|u-boot.img| RootMismatch: |u-boot.img|| Rootvfatname: |uenv-emmc.txt| RootMismatch: |uenv-e~1.txt|uenv-emmc.txt| RootMismatch: |uenv-e~1.txt|| Rootvfatname: |uenv.txt| RootName: uenv.txt, start: 0x649, size: 0xdb Size: 219, got: 219 do_fat_read_at:1235, ret=0 219 bytes read in 55 ms (2.9 KiB/s) Loaded env from uEnv.txt Importing environment from mmc0 ... switch to partitions #0, OK mmc0 is current device SD/MMC found on device 0 3835512 bytes read in 208 ms (17.6 MiB/s) 108119 bytes read in 33 ms (3.1 MiB/s) Booting from mmc0 ... Kernel image @ 0x82000000 [ 0x000000 - 0x3a8678 ] ## Flattened Device Tree blob at 88000000 Booting using the fdt blob at 0x88000000 Loading Device Tree to 8ffe2000, end 8ffff656 ... OK Starting kernel ... [ 0.000000] Booting Linux on physical CPU 0x0 [ 0.000000] Initializing cgroup subsys cpuset [ 0.000000] Initializing cgroup subsys cpu [ 0.000000] Initializing cgroup subsys cpuacct [ 0.000000] Linux version 4.4.14 (andy@bowei-Veriton-M490) (gcc version 5.3.1 20160113 (Linaro GCC 5.3-2016.02) ) #6 SMP PREEMPT Tue Sep 13 14:42:22 CST 2016 [ 0.000000] CPU: ARMv7 Processor [412fc0f2] revision 2 (ARMv7), cr=30c5387d [ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache [ 0.000000] Machine model: TI DRA742 [ 0.000000] Reserved memory: created CMA memory pool at 0x0000000095800000, size 56 MiB [ 0.000000] Reserved memory: initialized node ipu2_cma@95800000, compatible id shared-dma-pool [ 0.000000] Reserved memory: created CMA memory pool at 0x0000000099000000, size 64 MiB [ 0.000000] Reserved memory: initialized node dsp1_cma@99000000, compatible id shared-dma-pool [ 0.000000] Reserved memory: created CMA memory pool at 0x000000009d000000, size 32 MiB [ 0.000000] Reserved memory: initialized node ipu1_cma@9d000000, compatible id shared-dma-pool [ 0.000000] Reserved memory: created CMA memory pool at 0x000000009f000000, size 8 MiB [ 0.000000] Reserved memory: initialized node dsp2_cma@9f000000, compatible id shared-dma-pool [ 0.000000] cma: Reserved 24 MiB at 0x00000000de400000 [ 0.000000] Forcing write-allocate cache policy for SMP [ 0.000000] Memory policy: Data cache writealloc [ 0.000000] OMAP4: Map 0x00000000dfd00000 to fe600000 for dram barrier [ 0.000000] DRA752 ES2.0 [ 0.000000] PERCPU: Embedded 12 pages/cpu @ef1ac000 s19008 r8192 d21952 u49152 [ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 389440 [ 0.000000] Kernel command line: console=ttyO2,115200n8 root=PARTUUID=3eb8c574-02 rw rootfstype=ext4 rootwait [ 0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes) [ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) [ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) [ 0.000000] Memory: 1350068K/1564672K available (6999K kernel code, 376K rwdata, 2616K rodata, 348K init, 295K bss, 26188K reserved, 188416K cma-reserved, 757760K highmem) [ 0.000000] Virtual kernel memory layout: [ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB) [ 0.000000] fixmap : 0xffc00000 - 0xfff00000 (3072 kB) [ 0.000000] vmalloc : 0xf0800000 - 0xff800000 ( 240 MB) [ 0.000000] lowmem : 0xc0000000 - 0xf0000000 ( 768 MB) [ 0.000000] pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB) [ 0.000000] modules : 0xbf000000 - 0xbfe00000 ( 14 MB) [ 0.000000] .text : 0xc0008000 - 0xc096c05c (9617 kB) [ 0.000000] .init : 0xc096d000 - 0xc09c4000 ( 348 kB) [ 0.000000] .data : 0xc09c4000 - 0xc0a223a8 ( 377 kB) [ 0.000000] .bss : 0xc0a24000 - 0xc0a6dd40 ( 296 kB) [ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1 [ 0.000000] Preemptible hierarchical RCU implementation. [ 0.000000] Build-time adjustment of leaf fanout to 32. [ 0.000000] NR_IRQS:16 nr_irqs:16 16 [ 0.000000] OMAP clockevent source: timer1 at 31475 Hz [ 0.000000] Architected cp15 timer(s) running at 5.90MHz (virt). [ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x15c70fb29, max_idle_ns: 440795202138 ns [ 0.000005] sched_clock: 56 bits at 5MHz, resolution 169ns, wraps every 4398046511093ns [ 0.000016] Switching to timer-based delay loop, resolution 169ns [ 0.000333] clocksource: 32k_counter: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 58327039986419 ns [ 0.000341] OMAP clocksource: 32k_counter at 32768 Hz [ 0.000786] Console: colour dummy device 80x30 [ 0.000801] WARNING: Your 'console=ttyO2' has been replaced by 'ttyS2' [ 0.000808] This ensures that you still see kernel messages. Please [ 0.000813] update your kernel commandline. [ 0.000826] Calibrating delay loop (skipped), value calculated using timer frequency.. 11.80 BogoMIPS (lpj=59016) [ 0.000839] pid_max: default: 32768 minimum: 301 [ 0.000932] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes) [ 0.000942] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes) [ 0.001478] Initializing cgroup subsys io [ 0.001495] Initializing cgroup subsys memory [ 0.001517] Initializing cgroup subsys devices [ 0.001529] Initializing cgroup subsys freezer [ 0.001541] Initializing cgroup subsys perf_event [ 0.001552] Initializing cgroup subsys pids [ 0.001573] CPU: Testing write buffer coherency: ok [ 0.001771] /cpus/cpu@0 missing clock-frequency property [ 0.001787] /cpus/cpu@1 missing clock-frequency property [ 0.001797] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 [ 0.001833] Setting up static identity map for 0x80008380 - 0x800083d8 [ 0.080073] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001 [ 0.080132] Brought up 2 CPUs [ 0.080144] SMP: Total of 2 processors activated (23.60 BogoMIPS). [ 0.080151] CPU: All CPU(s) started in SVC mode. [ 0.080519] devtmpfs: initialized [ 0.106855] VFP support v0.3: implementor 41 architecture 4 part 30 variant f rev 0 [ 0.107785] omap_hwmod: l3_main_2 using broken dt data from ocp [ 0.303061] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns [ 0.306684] pinctrl core: initialized pinctrl subsystem [ 0.307537] NET: Registered protocol family 16 [ 0.308443] DMA: preallocated 256 KiB pool for atomic coherent allocations [ 0.340211] cpuidle: using governor ladder [ 0.370242] cpuidle: using governor menu [ 0.378927] OMAP GPIO hardware version 0.1 [ 0.382989] GPIO line 161 (radio_rst) hogged as output/low [ 0.411756] hw-breakpoint: found 5 (+1 reserved) breakpoint and 4 watchpoint registers. [ 0.411767] hw-breakpoint: maximum watchpoint size is 8 bytes. [ 0.412239] omap4_sram_init:Unable to allocate sram needed to handle errata I688 [ 0.412248] omap4_sram_init:Unable to get sram pool needed to handle errata I688 [ 0.412820] OMAP DMA hardware revision 0.0 [ 0.444454] omap-dma-engine 4a056000.dma-controller: OMAP DMA engine driver [ 0.445577] edma 43300000.edma: memcpy is disabled [ 0.450141] edma 43300000.edma: TI EDMA DMA engine driver [ 0.454255] omap-iommu 40d01000.mmu: 40d01000.mmu registered [ 0.454432] omap-iommu 40d02000.mmu: 40d02000.mmu registered [ 0.454594] omap-iommu 58882000.mmu: 58882000.mmu registered [ 0.454750] omap-iommu 55082000.mmu: 55082000.mmu registered [ 0.455049] omap-iommu 41501000.mmu: 41501000.mmu registered [ 0.455236] omap-iommu 41502000.mmu: 41502000.mmu registered [ 0.457374] SCSI subsystem initialized [ 0.457763] usbcore: registered new interface driver usbfs [ 0.457821] usbcore: registered new interface driver hub [ 0.457893] usbcore: registered new device driver usb [ 0.459212] palmas 0-0058: IRQ missing: skipping irq request [ 0.470724] palmas 0-0058: Muxing GPIO a, PWM 0, LED 0 [ 0.542589] omap_i2c 48070000.i2c: bus 0 rev0.12 at 400 kHz [ 0.560614] pcf857x: probe of 1-0026 failed with error -121 [ 0.561308] omap_i2c 48072000.i2c: bus 1 rev0.12 at 400 kHz [ 0.561672] omap_i2c 48060000.i2c: bus 2 rev0.12 at 400 kHz [ 0.580643] pcf857x: probe of 3-0021 failed with error -121 [ 0.580680] omap_i2c 4807a000.i2c: bus 3 rev0.12 at 400 kHz [ 0.580887] media: Linux media interface: v0.10 [ 0.580937] Linux video capture interface: v2.00 [ 0.580976] pps_core: LinuxPPS API ver. 1 registered [ 0.580983] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it> [ 0.581004] PTP clock support registered [ 0.581030] EDAC MC: Ver: 3.0.0 [ 0.581774] omap-mailbox 48840000.mailbox: omap mailbox rev 0x400 [ 0.582069] omap-mailbox 48842000.mailbox: omap mailbox rev 0x400 [ 0.582404] Advanced Linux Sound Architecture Driver Initialized. [ 0.583248] clocksource: Switched to clocksource arch_sys_counter [ 0.593526] NET: Registered protocol family 2 [ 0.594020] TCP established hash table entries: 8192 (order: 3, 32768 bytes) [ 0.594084] TCP bind hash table entries: 8192 (order: 4, 65536 bytes) [ 0.594209] TCP: Hash tables configured (established 8192 bind 8192) [ 0.594256] UDP hash table entries: 512 (order: 2, 16384 bytes) [ 0.594286] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes) [ 0.594472] NET: Registered protocol family 1 [ 0.594731] RPC: Registered named UNIX socket transport module. [ 0.594740] RPC: Registered udp transport module. [ 0.594746] RPC: Registered tcp transport module. [ 0.594752] RPC: Registered tcp NFSv4.1 backchannel transport module. [ 0.595713] hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available [ 0.597815] futex hash table entries: 512 (order: 3, 32768 bytes) [ 0.605407] squashfs: version 4.0 (2009/01/31) Phillip Lougher [ 0.606047] NFS: Registering the id_resolver key type [ 0.606072] Key type id_resolver registered [ 0.606080] Key type id_legacy registered [ 0.606151] ntfs: driver 2.1.32 [Flags: R/O]. [ 0.608115] bounce: pool size: 64 pages [ 0.608270] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 248) [ 0.608287] io scheduler noop registered [ 0.608301] io scheduler deadline registered [ 0.608336] io scheduler cfq registered (default) [ 0.613390] pinctrl-single 4a003400.pinmux: 282 pins at pa fc003400 size 1128 [ 0.616391] PCI host bridge /ocp/axi@0/pcie@51000000 ranges: [ 0.616404] No bus range found for /ocp/axi@0/pcie@51000000, using [bus 00-ff] [ 0.616437] IO 0x20003000..0x20012fff -> 0x00000000 [ 0.616458] MEM 0x20013000..0x2fffffff -> 0x20013000 [ 0.646393] dra7-pcie 51000000.pcie: link is not up [ 0.646568] dra7-pcie 51000000.pcie: PCI host bridge to bus 0000:00 [ 0.646581] pci_bus 0000:00: root bus resource [bus 00-ff] [ 0.646592] pci_bus 0000:00: root bus resource [io 0x0000-0xffff] [ 0.646601] pci_bus 0000:00: root bus resource [mem 0x20013000-0x2fffffff] [ 0.647006] PCI: bus0: Fast back to back transfers disabled [ 0.647120] PCI: bus1: Fast back to back transfers enabled [ 0.647170] irq: no irq domain found for /ocp/axi@0/pcie@51000000/interrupt-controller ! [ 0.647202] pci 0000:00:00.0: BAR 0: assigned [mem 0x20100000-0x201fffff] [ 0.647217] pci 0000:00:00.0: BAR 1: assigned [mem 0x20020000-0x2002ffff] [ 0.647229] pci 0000:00:00.0: PCI bridge to [bus 01] [ 0.647449] pcieport 0000:00:00.0: Signaling PME through PCIe PME interrupt [ 0.955123] fpd3_serdes 1-001b: Not a fpd3_24b_ser chip [ 0.955143] fpd3_serdes: probe of 5-002c failed with error -5 [ 0.955167] fpd3_serdes 1-001b: Serializer fpd3_24b_ser ready [ 0.955301] fpd3_serdes: probe of 5-002c failed with error -121 [ 1.014812] Serial: 8250/16550 driver, 10 ports, IRQ sharing disabled [ 1.018170] 4806c000.serial: ttyS1 at MMIO 0x4806c000 (irq = 301, base_baud = 3000000) is a 8250 [ 1.019071] console [ttyS2] disabled [ 1.019117] 48020000.serial: ttyS2 at MMIO 0x48020000 (irq = 302, base_baud = 3000000) is a 8250 [ 2.022302] console [ttyS2] enabled [ 2.027015] [drm] Initialized drm 1.1.0 20060810 [ 2.033777] OMAP DSS rev 6.1 [ 2.037558] omapdss_dss 58000000.dss: bound 58001000.dispc (ops dispc_component_ops) [ 2.045994] omapdss_dss 58000000.dss: bound 58040000.encoder (ops hdmi5_component_ops) [ 2.055208] dra7evm-tpd12s015 encoder@1: failed to parse CT CP HPD gpio [ 2.062276] connector-hdmi connector@1: failed to find video source [ 2.145028] loop: module loaded [ 2.148314] i2c i2c-5: Cannot translate chip addr 0x69 [ 2.157016] libphy: Fixed MDIO Bus: probed [ 2.203282] davinci_mdio 48485000.mdio: davinci mdio revision 1.6 [ 2.209405] davinci_mdio 48485000.mdio: detected phy mask 0 [ 2.291329] libphy: 48485000.mdio: probed [ 2.295457] davinci_mdio 48485000.mdio: phy[0]: device 48485000.mdio:00, driver unknown [ 2.303535] davinci_mdio 48485000.mdio: phy[1]: device 48485000.mdio:01, driver unknown [ 2.311577] davinci_mdio 48485000.mdio: phy[2]: device 48485000.mdio:02, driver unknown [ 2.319689] davinci_mdio 48485000.mdio: phy[3]: device 48485000.mdio:03, driver unknown [ 2.327768] davinci_mdio 48485000.mdio: phy[4]: device 48485000.mdio:04, driver unknown [ 2.335847] davinci_mdio 48485000.mdio: phy[5]: device 48485000.mdio:05, driver unknown [ 2.343903] davinci_mdio 48485000.mdio: phy[6]: device 48485000.mdio:06, driver unknown [ 2.351944] davinci_mdio 48485000.mdio: phy[7]: device 48485000.mdio:07, driver unknown [ 2.359997] davinci_mdio 48485000.mdio: phy[8]: device 48485000.mdio:08, driver unknown [ 2.368049] davinci_mdio 48485000.mdio: phy[9]: device 48485000.mdio:09, driver unknown [ 2.376100] davinci_mdio 48485000.mdio: phy[10]: device 48485000.mdio:0a, driver unknown [ 2.384746] davinci_mdio 48485000.mdio: phy[11]: device 48485000.mdio:0b, driver unknown [ 2.392874] davinci_mdio 48485000.mdio: phy[12]: device 48485000.mdio:0c, driver unknown [ 2.401017] davinci_mdio 48485000.mdio: phy[13]: device 48485000.mdio:0d, driver unknown [ 2.409163] davinci_mdio 48485000.mdio: phy[14]: device 48485000.mdio:0e, driver unknown [ 2.417303] davinci_mdio 48485000.mdio: phy[15]: device 48485000.mdio:0f, driver unknown [ 2.425442] davinci_mdio 48485000.mdio: phy[16]: device 48485000.mdio:10, driver unknown [ 2.433581] davinci_mdio 48485000.mdio: phy[17]: device 48485000.mdio:11, driver unknown [ 2.441708] davinci_mdio 48485000.mdio: phy[18]: device 48485000.mdio:12, driver unknown [ 2.449846] davinci_mdio 48485000.mdio: phy[19]: device 48485000.mdio:13, driver unknown [ 2.457986] davinci_mdio 48485000.mdio: phy[20]: device 48485000.mdio:14, driver unknown [ 2.466125] davinci_mdio 48485000.mdio: phy[21]: device 48485000.mdio:15, driver unknown [ 2.474265] davinci_mdio 48485000.mdio: phy[22]: device 48485000.mdio:16, driver unknown [ 2.482392] davinci_mdio 48485000.mdio: phy[23]: device 48485000.mdio:17, driver unknown [ 2.490531] davinci_mdio 48485000.mdio: phy[24]: device 48485000.mdio:18, driver unknown [ 2.498671] davinci_mdio 48485000.mdio: phy[25]: device 48485000.mdio:19, driver unknown [ 2.506810] davinci_mdio 48485000.mdio: phy[26]: device 48485000.mdio:1a, driver unknown [ 2.514950] davinci_mdio 48485000.mdio: phy[27]: device 48485000.mdio:1b, driver unknown [ 2.523076] davinci_mdio 48485000.mdio: phy[28]: device 48485000.mdio:1c, driver unknown [ 2.531214] davinci_mdio 48485000.mdio: phy[29]: device 48485000.mdio:1d, driver unknown [ 2.539358] davinci_mdio 48485000.mdio: phy[30]: device 48485000.mdio:1e, driver unknown [ 2.547498] davinci_mdio 48485000.mdio: phy[31]: device 48485000.mdio:1f, driver unknown [ 2.556310] cpsw 48484000.ethernet: Detected MACID = d0:b5:c2:51:25:c6 [ 2.563615] cpsw 48484000.ethernet: cpsw: Detected MACID = d0:b5:c2:51:25:c7 [ 2.572197] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver [ 2.578777] ehci-pci: EHCI PCI platform driver [ 2.583306] ehci-platform: EHCI generic platform driver [ 2.588856] ehci-omap: OMAP-EHCI Host Controller driver [ 2.594329] ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver [ 2.600550] ohci-pci: OHCI PCI platform driver [ 2.605075] ohci-platform: OHCI generic platform driver [ 2.611280] mousedev: PS/2 mouse device common for all mice [ 2.617749] ldc3001 0-0018: ldc3001_read_reg: i2c transfer failed (-121) [ 2.624506] ldc3001 0-0018: i2c_read len failed ffffff87 [ 2.629936] ldc3001 0-0018: ldc3001_read_reg: i2c transfer failed (-121) [ 2.636683] ldc3001 0-0018: i2c_read len failed ffffff87 [ 2.642108] ldc3001 0-0018: ldc3001_read_reg: i2c transfer failed (-121) [ 2.648856] ldc3001 0-0018: i2c_read len failed ffffff87 [ 2.654304] ldc3001 0-0018: ldc3001_read_reg: i2c transfer failed (-121) [ 2.661034] ldc3001 0-0018: i2c_read len failed ffffff87 [ 2.666490] ldc3001 0-0018: ldc3001_read_reg: i2c transfer failed (-121) [ 2.673220] ldc3001 0-0018: i2c_read len failed ffffff87 [ 2.678666] ldc3001 0-0018: ldc3001_read_reg: i2c transfer failed (-121) [ 2.685413] ldc3001 0-0018: i2c_read len failed ffffff87 [ 2.690843] ldc3001 0-0018: ldc3001_read_reg: i2c transfer failed (-121) [ 2.697591] ldc3001 0-0018: i2c_read len failed ffffff87 [ 2.703022] ldc3001 0-0018: ldc3001_read_reg: i2c transfer failed (-121) [ 2.709770] ldc3001 0-0018: i2c_read len failed ffffff87 [ 2.715217] ldc3001 0-0018: ldc3001_read_reg: i2c transfer failed (-121) [ 2.721946] ldc3001 0-0018: i2c_read len failed ffffff87 [ 2.727393] ldc3001 0-0018: ldc3001_read_reg: i2c transfer failed (-121) [ 2.734140] ldc3001 0-0018: i2c_read len failed ffffff87 [ 2.739569] ldc3001 0-0018: ldc3001_read_reg: i2c transfer failed (-121) [ 2.746316] ldc3001 0-0018: i2c_read len failed ffffff87 [ 2.751743] ldc3001 0-0018: ldc3001_read_reg: i2c transfer failed (-121) [ 2.758489] ldc3001 0-0018: i2c_read len failed ffffff87 [ 2.763910] input: LDC 3001 TouchScreen Controller as /devices/platform/44000000.ocp/48070000.i2c/i2c-0/0-0018/input/input0 [ 2.775117] ldc3001 0-0018: ldc3001_read_reg: i2c transfer failed (-121) [ 2.781849] ldc3001 0-0018: i2c_read len failed ffffff87 [ 2.787293] ldc3001 0-0018: ldc3001_read_reg: i2c transfer failed (-121) [ 2.794046] ldc3001 0-0018: i2c_read len failed ffffff87 [ 2.799482] ldc3001 0-0018: ldc3001_read_reg: i2c transfer failed (-121) [ 2.799872] i2c /dev entries driver [ 2.800683] tvp5158 1-0058: Unable to of_probe [ 2.801632] vpe 489d0000.vpe: loading firmware vpdma-1b8.bin [ 2.803055] vip 48970000.vip: loading firmware vpdma-1b8.bin [ 2.803819] i2c i2c-5: Cannot translate chip addr 0x18 [ 2.803827] i2c i2c-5: Cannot translate chip addr 0x19 [ 2.803834] i2c i2c-5: Cannot translate chip addr 0x1a [ 2.803840] i2c i2c-5: Cannot translate chip addr 0x29 [ 2.803846] i2c i2c-5: Cannot translate chip addr 0x2a [ 2.803852] i2c i2c-5: Cannot translate chip addr 0x2b [ 2.803859] i2c i2c-5: Cannot translate chip addr 0x48 [ 2.803864] i2c i2c-5: Cannot translate chip addr 0x49 [ 2.803870] i2c i2c-5: Cannot translate chip addr 0x4a [ 2.803876] i2c i2c-5: Cannot translate chip addr 0x4b [ 2.803881] i2c i2c-5: Cannot translate chip addr 0x4c [ 2.803886] i2c i2c-5: Cannot translate chip addr 0x4d [ 2.803892] i2c i2c-5: Cannot translate chip addr 0x4e [ 2.803897] i2c i2c-5: Cannot translate chip addr 0x4f [ 2.803965] i2c i2c-5: Cannot translate chip addr 0x18 [ 2.803971] i2c i2c-5: Cannot translate chip addr 0x19 [ 2.803977] i2c i2c-5: Cannot translate chip addr 0x29 [ 2.803983] i2c i2c-5: Cannot translate chip addr 0x4c [ 2.803989] i2c i2c-5: Cannot translate chip addr 0x4d [ 2.807350] omap_hsmmc 4809c000.mmc: Got CD GPIO [ 2.823441] vpe 489d0000.vpe: Device registered as /dev/video0 [ 2.843264] vip 48970000.vip: VPDMA firmware loaded [ 2.939086] ldc3001 0-0018: i2c_read len failed ffffff87 [ 2.944536] ldc3001 0-0018: ldc3001_read_reg: i2c transfer failed (-121) [ 2.945181] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr25 mode [ 2.945186] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr12 mode [ 2.945332] evm_3v3_sw: supplied by sysen1 [ 2.968174] ldc3001 0-0018: i2c_read len failed ffffff87 [ 2.973611] ldc3001 0-0018: ldc3001_read_reg: i2c transfer failed (-121) [ 2.980341] ldc3001 0-0018: i2c_read len failed ffffff87 [ 2.985780] ldc3001 0-0018: ldc3001_read_reg: i2c transfer failed (-121) [ 2.992511] ldc3001 0-0018: i2c_read len failed ffffff87 [ 2.997951] ldc3001 0-0018: ldc3001_read_reg: i2c transfer failed (-121) [ 3.004699] ldc3001 0-0018: i2c_read len failed ffffff87 [ 3.010129] ldc3001 0-0018: ldc3001_read_reg: i2c transfer failed (-121) [ 3.016873] ldc3001 0-0018: i2c_read len failed ffffff87 [ 3.022300] ldc3001 0-0018: ldc3001_read_reg: i2c transfer failed (-121) [ 3.029043] ldc3001 0-0018: i2c_read len failed ffffff87 [ 3.034494] ldc3001 0-0018: ldc3001_read_reg: i2c transfer failed (-121) [ 3.041223] ldc3001 0-0018: i2c_read len failed ffffff87 [ 3.044207] ledtrig-cpu: registered to indicate activity on CPUs [ 3.046573] hwspinlock_user gatemp: requested 10 hwspinlocks [ 3.047237] extcon-usb-gpio extcon_usb1: failed to get ID GPIO [ 3.047308] extcon-usb-gpio extcon_usb2: failed to get ID GPIO [ 3.048627] aic_dvdd: supplied by evm_3v3_sw [ 3.050815] davinci-mcasp 48464000.mcasp: DAI is shared [ 3.053062] omap_hwmod: mcasp2: _wait_target_ready failed: -16 [ 3.053485] Unhandled fault: asynchronous external abort (0x1211) at 0x00000000 [ 3.053489] pgd = c0003000 [ 3.053496] [00000000] *pgd=80000080004003, *pmd=00000000 [ 3.053503] Internal error: : 1211 [#1] PREEMPT SMP ARM [ 3.053508] Modules linked in: [ 3.053515] CPU: 1 PID: 6 Comm: kworker/u4:0 Not tainted 4.4.14 #6 [ 3.053518] Hardware name: Generic DRA74X (Flattened Device Tree) [ 3.053527] Workqueue: kmmcd mmc_rescan [ 3.053531] task: eec89e00 ti: eecac000 task.ti: eecac000 [ 3.053538] PC is at arch_counter_get_cntvct+0x10/0x18 [ 3.053545] LR is at arch_timer_read_counter_long+0x1c/0x20 [ 3.053550] pc : [<c0557a20>] lr : [<c0016ef0>] psr: a0000013 [ 3.053550] sp : eecadd38 ip : eecadd48 fp : eecadd44 [ 3.053553] r10: 00000000 r9 : 00000001 r8 : eecadde8 [ 3.053557] r7 : 066665b0 r6 : 035aca34 r5 : 0000170d r4 : c0a57420 [ 3.053560] r3 : c0557a10 r2 : 65c22580 r1 : 00000000 r0 : 00001116 [ 3.053565] Flags: NzCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment kernel [ 3.053569] Control: 30c5387d Table: 80003000 DAC: 55555555 [ 3.053573] Process kworker/u4:0 (pid: 6, stack limit = 0xeecac210) [ 3.053577] Stack: (0xeecadd38 to 0xeecae000) [ 3.053581] dd20: eecadd54 eecadd48 [ 3.053586] dd40: c0016ef0 c0557a1c eecadd74 eecadd58 c02b1338 c0016ee0 00000199 eecf8c00 [ 3.053592] dd60: c09f1274 066665b0 eecadd84 eecadd78 c02b1370 c02b12f0 eecaddac eecadd88 [ 3.053598] dd80: c053acb4 c02b1354 eecadde8 eecf8c00 eecf8c00 eecadea7 00000000 00000001 [ 3.053603] dda0: eecaddc4 eecaddb0 c053ae00 c053ac38 eecadde8 eecaddf8 eecadde4 eecaddc8 [ 3.053608] ddc0: c053aec0 c053ad14 eecade34 eecf8c00 00000000 eecadea7 eecade2c eecadde8 [ 3.053613] dde0: c053b470 c053ae7c 00000000 eecade34 00000000 00000000 00000000 00000000 [ 3.053619] de00: eecade00 eecade00 c053ae58 00000000 eecade3c 00000c00 00000c00 eecf8c00 [ 3.053624] de20: eecade94 eecade30 c0545e64 c053b41c 60000013 00000034 00000c00 00000000 [ 3.053629] de40: 00000000 00000000 00000000 00000195 00000000 00000000 00000000 00000000 [ 3.053635] de60: 00000000 eecadde8 c053b060 eecf8c00 00061a80 eecf8c00 c075a380 c075a38c [ 3.053640] de80: 00000000 eeca4000 eecadebc eecade98 c0546334 c0545dd4 00000000 eecadea7 [ 3.053645] dea0: c075a380 eeeb0800 00000000 eecf8e58 eecadee4 eecadec0 c053da38 c0546314 [ 3.053651] dec0: eecf8e58 eec5f000 eeca4000 00000000 eeeb0800 00000000 eecadf24 eecadee8 [ 3.053656] dee0: c0049dc4 c053d7d0 eeca4000 eeca4014 eecac000 00000088 eec5f000 eeca4000 [ 3.053661] df00: eec5f018 eeca4014 eecac000 00000088 eec5f000 eeca4000 eecadf5c eecadf28 [ 3.053667] df20: c004a0e0 c0049cac eeca4164 c09c6100 00000000 00000000 eec5e1c0 eec5f000 [ 3.053672] df40: c004a094 00000000 00000000 00000000 eecadfac eecadf60 c004fc38 c004a0a0 [ 3.053677] df60: 60010a04 00000000 00008110 eec5f000 00000000 00000000 eecadf78 eecadf78 [ 3.053682] df80: 00000000 00000000 eecadf88 eecadf88 eec5e1c0 c004fb54 00000000 00000000 [ 3.053687] dfa0: 00000000 eecadfb0 c000fb88 c004fb60 00000000 00000000 00000000 00000000 [ 3.053692] dfc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 [ 3.053697] dfe0: 00000000 00000000 00000000 00000000 00000013 00000000 00000311 1800a001 [ 3.053701] Backtrace: [ 3.053709] [<c0557a10>] (arch_counter_get_cntvct) from [<c0016ef0>] (arch_timer_read_counter_long+0x1c/0x20) [ 3.053718] [<c0016ed4>] (arch_timer_read_counter_long) from [<c02b1338>] (__timer_delay+0x54/0x64) [ 3.053724] [<c02b12e4>] (__timer_delay) from [<c02b1370>] (__timer_const_udelay+0x28/0x2c) [ 3.053735] r7:066665b0 r6:c09f1274 r5:eecf8c00 r4:00000199 [ 3.053745] [<c02b1348>] (__timer_const_udelay) from [<c053acb4>] (__mmc_start_request+0x88/0xdc) [ 3.053754] [<c053ac2c>] (__mmc_start_request) from [<c053ae00>] (mmc_start_request+0xf8/0x120) [ 3.053766] r9:00000001 r8:00000000 r7:eecadea7 r6:eecf8c00 r5:eecf8c00 r4:eecadde8 [ 3.053775] [<c053ad08>] (mmc_start_request) from [<c053aec0>] (__mmc_start_req+0x50/0x70) [ 3.053781] r5:eecaddf8 r4:eecadde8 [ 3.053790] [<c053ae70>] (__mmc_start_req) from [<c053b470>] (mmc_wait_for_cmd+0x60/0x8c) [ 3.053799] r7:eecadea7 r6:00000000 r5:eecf8c00 r4:eecade34 [ 3.053809] [<c053b410>] (mmc_wait_for_cmd) from [<c0545e64>] (mmc_io_rw_direct_host+0x9c/0x138) [ 3.053816] r6:eecf8c00 r5:00000c00 r4:00000c00 [ 3.053825] [<c0545dc8>] (mmc_io_rw_direct_host) from [<c0546334>] (sdio_reset+0x2c/0x64) [ 3.053836] r10:eeca4000 r9:00000000 r8:c075a38c r7:c075a380 r6:eecf8c00 r5:00061a80 [ 3.053839] r4:eecf8c00 [ 3.053847] [<c0546308>] (sdio_reset) from [<c053da38>] (mmc_rescan+0x274/0x318) [ 3.053851] r4:eecf8e58 [ 3.053859] [<c053d7c4>] (mmc_rescan) from [<c0049dc4>] (process_one_work+0x124/0x3f4) [ 3.053870] r9:00000000 r8:eeeb0800 r7:00000000 r6:eeca4000 r5:eec5f000 r4:eecf8e58 [ 3.053879] [<c0049ca0>] (process_one_work) from [<c004a0e0>] (worker_thread+0x4c/0x524) [ 3.053890] r10:eeca4000 r9:eec5f000 r8:00000088 r7:eecac000 r6:eeca4014 r5:eec5f018 [ 3.053893] r4:eeca4000 [ 3.053901] [<c004a094>] (worker_thread) from [<c004fc38>] (kthread+0xe4/0xfc) [ 3.053913] r10:00000000 r9:00000000 r8:00000000 r7:c004a094 r6:eec5f000 r5:eec5e1c0 [ 3.053916] r4:00000000 [ 3.053925] [<c004fb54>] (kthread) from [<c000fb88>] (ret_from_fork+0x14/0x2c) [ 3.053933] r7:00000000 r6:00000000 r5:c004fb54 r4:eec5e1c0 [ 3.053939] Code: e1a0c00d e92dd800 e24cb004 f57ff06f (ec510f1e) [ 3.053956] ---[ end trace 49f19b15200d07a3 ]--- [ 3.053994] Unable to handle kernel paging request at virtual address ffffffec [ 3.053997] pgd = c0003000 [ 3.054006] [ffffffec] *pgd=80000080007003, *pmd=affae003, *pte=00000000 [ 3.054010] Internal error: Oops: 207 [#2] PREEMPT SMP ARM [ 3.054015] Modules linked in: [ 3.054021] CPU: 1 PID: 6 Comm: kworker/u4:0 Tainted: G D 4.4.14 #6 [ 3.054024] Hardware name: Generic DRA74X (Flattened Device Tree) [ 3.054034] task: eec89e00 ti: eecac000 task.ti: eecac000 [ 3.054040] PC is at kthread_data+0x10/0x18 [ 3.054045] LR is at wq_worker_sleeping+0x14/0xd8 [ 3.054050] pc : [<c0050088>] lr : [<c004ae90>] psr: 20000193 [ 3.054050] sp : eecadae0 ip : eecadaf0 fp : eecadaec [ 3.054053] r10: 00000001 r9 : ef1bbe40 r8 : eec8a1a8 [ 3.054056] r7 : c09c66d4 r6 : c09c2e40 r5 : eec89e00 r4 : 00000001 [ 3.054059] r3 : 00000000 r2 : 00000000 r1 : 00000001 r0 : eec89e00 [ 3.054063] Flags: nzCv IRQs off FIQs on Mode SVC_32 ISA ARM Segment user [ 3.054067] Control: 30c5387d Table: 80003000 DAC: 55555555 [ 3.054070] Process kworker/u4:0 (pid: 6, stack limit = 0xeecac210) [ 3.054073] Stack: (0xeecadae0 to 0xeecae000) [ 3.054079] dae0: eecadb04 eecadaf0 c004ae90 c0050084 ef1bbe40 eec89e00 eecadb5c eecadb08 [ 3.054085] db00: c06d8130 c004ae88 c0a24e54 eec92b40 eecadb2c eecadb20 c008bf48 c008bccc [ 3.054091] db20: eecadb74 c06d8368 00000000 c008bf3c c0035d04 eecac000 eecad844 eec88000 [ 3.054096] db40: eecadb80 eec8a120 c088de54 c088de5c eecadb74 eecadb60 c06d8368 c06d7cb8 [ 3.054102] db60: eec89e00 eecad844 eecadb9c eecadb78 c00379f4 c06d8320 c0557a22 00000000 [ 3.054107] db80: eecadb80 eecadb80 c0034dac 00000001 eecadc24 eecadba0 c00135f0 c00373c0 [ 3.054112] dba0: eecac210 0000000b 00000000 00000008 00000000 00000000 c0557a24 60000193 [ 3.054118] dbc0: 6507ec04 63306131 20643030 64323965 30303864 34326520 30306263 35662034 [ 3.054123] dbe0: 30666637 28206636 31356365 65316630 ee002029 eecadc10 c001cac8 c09cb3f4 [ 3.054129] dc00: 00001211 00000007 00000000 eecadce8 00000001 00000000 eecadc34 eecadc28 [ 3.054134] dc20: c00137e8 c00133b0 eecadce4 eecadc38 c0009314 c00137d4 00000000 00000002 [ 3.054139] dc40: 00000007 00000000 00000000 00000000 eec89e00 eec88000 00000000 c09dc4e0 [ 3.054144] dc60: 00000000 00000001 eecadccc eecadc78 c06d7f90 c00547c4 c0038b3c c008d018 [ 3.054150] dc80: c09c0424 00000013 b4de674a 00000000 c007fad0 c06d8864 b5644cb4 00000000 [ 3.054155] dca0: eecadce8 eecac000 a0000013 ffffffff eecadd1c c0013ea0 eecac000 00000000 [ 3.054160] dcc0: eecadce4 c0557a20 a0000013 ffffffff eecadd1c eecadde8 eecadd44 eecadce8 [ 3.054165] dce0: c0013e18 c000926c 00001116 00000000 65c22580 c0557a10 c0a57420 0000170d [ 3.054171] dd00: 035aca34 066665b0 eecadde8 00000001 00000000 eecadd44 eecadd48 eecadd38 [ 3.054176] dd20: c0016ef0 c0557a20 a0000013 ffffffff c02b1338 c0016ee8 eecadd54 eecadd48 [ 3.054182] dd40: c0016ef0 c0557a1c eecadd74 eecadd58 c02b1338 c0016ee0 00000199 eecf8c00 [ 3.054188] dd60: c09f1274 066665b0 eecadd84 eecadd78 c02b1370 c02b12f0 eecaddac eecadd88 [ 3.054193] dd80: c053acb4 c02b1354 eecadde8 eecf8c00 eecf8c00 eecadea7 00000000 00000001 [ 3.054198] dda0: eecaddc4 eecaddb0 c053ae00 c053ac38 eecadde8 eecaddf8 eecadde4 eecaddc8 [ 3.054204] ddc0: c053aec0 c053ad14 eecade34 eecf8c00 00000000 eecadea7 eecade2c eecadde8 [ 3.054209] dde0: c053b470 c053ae7c 00000000 eecade34 00000000 00000000 00000000 00000000 [ 3.054214] de00: eecade00 eecade00 c053ae58 00000000 eecade3c 00000c00 00000c00 eecf8c00 [ 3.054220] de20: eecade94 eecade30 c0545e64 c053b41c 60000013 00000034 00000c00 00000000 [ 3.054224] de40: 00000000 00000000 00000000 00000195 00000000 00000000 00000000 00000000 [ 3.054230] de60: 00000000 eecadde8 c053b060 eecf8c00 00061a80 eecf8c00 c075a380 c075a38c [ 3.054235] de80: 00000000 eeca4000 eecadebc eecade98 c0546334 c0545dd4 00000000 eecadea7 [ 3.054240] dea0: c075a380 eeeb0800 00000000 eecf8e58 eecadee4 eecadec0 c053da38 c0546314 [ 3.054245] dec0: eecf8e58 eec5f000 eeca4000 00000000 eeeb0800 00000000 eecadf24 eecadee8 [ 3.054250] dee0: c0049dc4 c053d7d0 eeca4000 eeca4014 eecac000 00000088 eec5f000 eeca4000 [ 3.054255] df00: eec5f018 eeca4014 eecac000 00000088 eec5f000 eeca4000 eecadf5c eecadf28 [ 3.054260] df20: c004a0e0 c0049cac eeca4164 c09c6100 00000000 00000000 eec5e1c0 eec5f000 [ 3.054265] df40: c004a094 00000000 00000000 00000000 eecadfac eecadf60 c004fc38 c004a0a0 [ 3.054270] df60: 60010a04 00000000 00008110 eec5f000 00000000 00000000 eecadf78 eecadf78 [ 3.054275] df80: 00000001 00010001 eecadf88 eecadf88 eec5e1c0 c004fb54 00000000 00000000 [ 3.054280] dfa0: 00000000 eecadfb0 c000fb88 c004fb60 00000000 00000000 00000000 00000000 [ 3.054285] dfc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 [ 3.054289] dfe0: 00000000 00000000 00000000 00000000 00000013 00000000 00000311 1800a001 [ 3.054293] Backtrace: [ 3.054302] [<c0050078>] (kthread_data) from [<c004ae90>] (wq_worker_sleeping+0x14/0xd8) [ 3.054311] [<c004ae7c>] (wq_worker_sleeping) from [<c06d8130>] (__schedule+0x484/0x668) [ 3.054317] r5:eec89e00 r4:ef1bbe40 [ 3.054323] [<c06d7cac>] (__schedule) from [<c06d8368>] (schedule+0x54/0xc4) [ 3.054334] r10:c088de5c r9:c088de54 r8:eec8a120 r7:eecadb80 r6:eec88000 r5:eecad844 [ 3.054337] r4:eecac000 [ 3.054345] [<c06d8314>] (schedule) from [<c00379f4>] (do_exit+0x640/0x9b8) [ 3.054350] r5:eecad844 r4:eec89e00 [ 3.054356] [<c00373b4>] (do_exit) from [<c00135f0>] (die+0x24c/0x424) [ 3.054360] r7:00000001 [ 3.054365] [<c00133a4>] (die) from [<c00137e8>] (arm_notify_die+0x20/0x58) [ 3.054377] r10:00000000 r9:00000001 r8:eecadce8 r7:00000000 r6:00000007 r5:00001211 [ 3.054381] r4:c09cb3f4 [ 3.054387] [<c00137c8>] (arm_notify_die) from [<c0009314>] (do_DataAbort+0xb4/0xb8) [ 3.054393] [<c0009260>] (do_DataAbort) from [<c0013e18>] (__dabt_svc+0x38/0x60) [ 3.054396] Exception stack(0xeecadce8 to 0xeecadd30) [ 3.054401] dce0: 00001116 00000000 65c22580 c0557a10 c0a57420 0000170d [ 3.054406] dd00: 035aca34 066665b0 eecadde8 00000001 00000000 eecadd44 eecadd48 eecadd38 [ 3.054410] dd20: c0016ef0 c0557a20 a0000013 ffffffff [ 3.054421] r8:eecadde8 r7:eecadd1c r6:ffffffff r5:a0000013 r4:c0557a20 [ 3.054429] [<c0557a10>] (arch_counter_get_cntvct) from [<c0016ef0>] (arch_timer_read_counter_long+0x1c/0x20) [ 3.054436] [<c0016ed4>] (arch_timer_read_counter_long) from [<c02b1338>] (__timer_delay+0x54/0x64) [ 3.054442] [<c02b12e4>] (__timer_delay) from [<c02b1370>] (__timer_const_udelay+0x28/0x2c) [ 3.054451] r7:066665b0 r6:c09f1274 r5:eecf8c00 r4:00000199 [ 3.054459] [<c02b1348>] (__timer_const_udelay) from [<c053acb4>] (__mmc_start_request+0x88/0xdc) [ 3.054468] [<c053ac2c>] (__mmc_start_request) from [<c053ae00>] (mmc_start_request+0xf8/0x120) [ 3.054479] r9:00000001 r8:00000000 r7:eecadea7 r6:eecf8c00 r5:eecf8c00 r4:eecadde8 [ 3.054487] [<c053ad08>] (mmc_start_request) from [<c053aec0>] (__mmc_start_req+0x50/0x70) [ 3.054493] r5:eecaddf8 r4:eecadde8 [ 3.054501] [<c053ae70>] (__mmc_start_req) from [<c053b470>] (mmc_wait_for_cmd+0x60/0x8c) [ 3.054509] r7:eecadea7 r6:00000000 r5:eecf8c00 r4:eecade34 [ 3.054519] [<c053b410>] (mmc_wait_for_cmd) from [<c0545e64>] (mmc_io_rw_direct_host+0x9c/0x138) [ 3.054527] r6:eecf8c00 r5:00000c00 r4:00000c00 [ 3.054535] [<c0545dc8>] (mmc_io_rw_direct_host) from [<c0546334>] (sdio_reset+0x2c/0x64) [ 3.054546] r10:eeca4000 r9:00000000 r8:c075a38c r7:c075a380 r6:eecf8c00 r5:00061a80 [ 3.054550] r4:eecf8c00 [ 3.054556] [<c0546308>] (sdio_reset) from [<c053da38>] (mmc_rescan+0x274/0x318) [ 3.054560] r4:eecf8e58 [ 3.054567] [<c053d7c4>] (mmc_rescan) from [<c0049dc4>] (process_one_work+0x124/0x3f4) [ 3.054578] r9:00000000 r8:eeeb0800 r7:00000000 r6:eeca4000 r5:eec5f000 r4:eecf8e58 [ 3.054586] [<c0049ca0>] (process_one_work) from [<c004a0e0>] (worker_thread+0x4c/0x524) [ 3.054597] r10:eeca4000 r9:eec5f000 r8:00000088 r7:eecac000 r6:eeca4014 r5:eec5f018 [ 3.054600] r4:eeca4000 [ 3.054607] [<c004a094>] (worker_thread) from [<c004fc38>] (kthread+0xe4/0xfc) [ 3.054618] r10:00000000 r9:00000000 r8:00000000 r7:c004a094 r6:eec5f000 r5:eec5e1c0 [ 3.054622] r4:00000000 [ 3.054629] [<c004fb54>] (kthread) from [<c000fb88>] (ret_from_fork+0x14/0x2c) [ 3.054637] r7:00000000 r6:00000000 r5:c004fb54 r4:eec5e1c0 [ 3.054643] Code: e1a0c00d e92dd800 e24cb004 e5903378 (e5130014) [ 3.054647] ---[ end trace 49f19b15200d07a4 ]--- [ 3.054650] Fixing recursive fault but reboot is needed! [ 3.058297] ------------[ cut here ]------------ [ 3.058308] WARNING: CPU: 0 PID: 88 at drivers/bus/omap_l3_noc.c:147 l3_interrupt_handler+0x25c/0x368() [ 3.058313] 44000000.ocp:L3 Custom Error: MASTER MPU TARGET L4_PER2_P3 (Read): Data Access in User mode during Functional access [ 3.058317] Modules linked in: [ 3.058323] CPU: 0 PID: 88 Comm: irq/53-0-0018 Tainted: G D 4.4.14 #6 [ 3.058326] Hardware name: Generic DRA74X (Flattened Device Tree) [ 3.058330] Backtrace: [ 3.058344] [<c00131a4>] (dump_backtrace) from [<c00133a0>] (show_stack+0x18/0x1c) [ 3.058354] r7:c02df370 r6:20000193 r5:00000000 r4:c09f128c [ 3.058364] [<c0013388>] (show_stack) from [<c02b354c>] (dump_stack+0x8c/0xa0) [ 3.058371] [<c02b34c0>] (dump_stack) from [<c0034ca0>] (warn_slowpath_common+0x88/0xb8) [ 3.058381] r7:c02df370 r6:00000093 r5:00000009 r4:ee67d9a8 [ 3.058387] [<c0034c18>] (warn_slowpath_common) from [<c0034d08>] (warn_slowpath_fmt+0x38/0x40) [ 3.058397] r8:00000017 r7:c08c5fa8 r6:00000002 r5:c08c6068 r4:c08c610c [ 3.058404] [<c0034cd4>] (warn_slowpath_fmt) from [<c02df370>] (l3_interrupt_handler+0x25c/0x368) [ 3.058409] r3:eedb5980 r2:c08c610c [ 3.058412] r4:80080003 [ 3.058423] [<c02df114>] (l3_interrupt_handler) from [<c00801c8>] (handle_irq_event_percpu+0xb4/0x160) [ 3.058434] r10:c0a2160a r9:eedb2840 r8:00000017 r7:00000000 r6:00000000 r5:eedb28a0 [ 3.058437] r4:eedb5e80 [ 3.058445] [<c0080114>] (handle_irq_event_percpu) from [<c00802b4>] (handle_irq_event+0x40/0x64) [ 3.058456] r10:c0a46e60 r9:00000131 r8:eec08000 r7:00000000 r6:c09cc284 r5:eedb28a0 [ 3.058459] r4:eedb2840 [ 3.058467] [<c0080274>] (handle_irq_event) from [<c00835e0>] (handle_fasteoi_irq+0xc0/0x194) [ 3.058475] r7:00000000 r6:c09cc284 r5:eedb28a0 r4:eedb2840 [ 3.058482] [<c0083520>] (handle_fasteoi_irq) from [<c007f7f4>] (generic_handle_irq+0x2c/0x3c) [ 3.058490] r7:00000000 r6:ee67dc80 r5:00000017 r4:c09c0424 [ 3.058498] [<c007f7c8>] (generic_handle_irq) from [<c007facc>] (__handle_domain_irq+0x64/0xbc) [ 3.058504] [<c007fa68>] (__handle_domain_irq) from [<c000948c>] (gic_handle_irq+0x40/0x7c) [ 3.058515] r9:00000131 r8:fa213000 r7:fa212000 r6:ee67db68 r5:fa21200c r4:c09c68e0 [ 3.058521] [<c000944c>] (gic_handle_irq) from [<c0013e80>] (__irq_svc+0x40/0x74) [ 3.058524] Exception stack(0xee67db68 to 0xee67dbb0) [ 3.058530] db60: 00000000 c0a25300 00000000 00000000 00000282 00000013 [ 3.058535] db80: ee67c000 00000000 eec08000 00000131 c0a46e60 ee67dc14 ee67dc18 ee67dbb8 [ 3.058539] dba0: c0038b58 c00386c4 60000113 ffffffff [ 3.058550] r9:00000131 r8:eec08000 r7:ee67db9c r6:ffffffff r5:60000113 r4:c00386c4 [ 3.058557] [<c0038630>] (__do_softirq) from [<c0038b58>] (irq_exit+0xbc/0x11c) [ 3.058568] r10:c0a46e60 r9:00000131 r8:eec08000 r7:00000000 r6:00000000 r5:00000013 [ 3.058571] r4:ffffe000 [ 3.058579] [<c0038a9c>] (irq_exit) from [<c007fad0>] (__handle_domain_irq+0x68/0xbc) [ 3.058584] r5:00000013 r4:c09c0424 [ 3.058591] [<c007fa68>] (__handle_domain_irq) from [<c000948c>] (gic_handle_irq+0x40/0x7c) [ 3.058601] r9:00000131 r8:fa213000 r7:fa212000 r6:ee67dc80 r5:fa21200c r4:c09c68e0 [ 3.058607] [<c000944c>] (gic_handle_irq) from [<c0013e80>] (__irq_svc+0x40/0x74) [ 3.058610] Exception stack(0xee67dc80 to 0xee67dcc8) [ 3.058615] dc80: 00000000 00000000 00000001 60000113 00000000 c0a2e440 00000000 00000006 [ 3.058621] dca0: 00000040 00000131 c0a46e60 ee67dd2c ee67dc08 ee67dcd0 c036a894 c007e3b4 [ 3.058624] dcc0: 60000113 ffffffff [ 3.058635] r9:00000131 r8:00000040 r7:ee67dcb4 r6:ffffffff r5:60000113 r4:c007e3b4 [ 3.058643] [<c007e044>] (console_unlock) from [<c007e840>] (vprintk_emit+0x2a8/0x534) [ 3.058653] r10:00000000 r9:00000000 r8:00000000 r7:c0a26ee0 r6:c0a49834 r5:00000003 [ 3.058656] r4:0000002c [ 3.058669] [<c007e598>] (vprintk_emit) from [<c03dd9f4>] (dev_vprintk_emit+0xa8/0x1d0) [ 3.058680] r10:c089458c r9:ee67de6c r8:c08e08d8 r7:00000003 r6:ee67dda0 r5:eeed0420 [ 3.058683] r4:0000000e [ 3.058691] [<c03dd94c>] (dev_vprintk_emit) from [<c03ddb44>] (dev_printk_emit+0x28/0x30) [ 3.058701] r10:c008121c r9:ee661000 r8:eedd9180 r7:00000001 r6:ee65f790 r5:eedd9180 [ 3.058705] r4:eeed0400 [ 3.058713] [<c03ddb20>] (dev_printk_emit) from [<c03ddc0c>] (__dev_printk+0x54/0x94) [ 3.058718] r3:c0900908 r2:c08e08d8 [ 3.058727] [<c03ddbb8>] (__dev_printk) from [<c03ddda0>] (dev_err+0x40/0x48) [ 3.058737] [<c03ddd64>] (dev_err) from [<c04e7bbc>] (ldc3001_ts_interrupt+0x54/0x27c) [ 3.058744] r3:00000000 r2:ffffff87 r1:c0900838 [ 3.058752] [<c04e7b68>] (ldc3001_ts_interrupt) from [<c0081240>] (irq_thread_fn+0x24/0x5c) [ 3.058763] r10:c008121c r9:ee661000 r8:eedd9180 r7:00000001 r6:00000000 r5:eedd9180 [ 3.058766] r4:ee661000 [ 3.058774] [<c008121c>] (irq_thread_fn) from [<c0081548>] (irq_thread+0x140/0x1f8) [ 3.058782] r7:00000001 r6:00000000 r5:ee661024 r4:ee67c000 [ 3.058790] [<c0081408>] (irq_thread) from [<c004fc38>] (kthread+0xe4/0xfc) [ 3.058800] r10:00000000 r9:00000000 r8:00000000 r7:c0081408 r6:ee661000 r5:ee661040 [ 3.058803] r4:00000000 [ 3.058811] [<c004fb54>] (kthread) from [<c000fb88>] (ret_from_fork+0x14/0x2c) [ 3.058819] r7:00000000 r6:00000000 r5:c004fb54 r4:ee661040 [ 3.058822] ---[ end trace 49f19b15200d07a5 ]---
