I urgently need to know if I absolutely need to have RESET de-asserted (high) 1000 nS prior to the de-assertion of POR (high) in order for the Boot and Device Configuration Pins to be latched properly. In the data sheet for the TMS320C6457, Figure 7-9 Power-On Reset Timing indicates that RESET must be high prior to POR transitioning high. However, all of the descriptions associated with the operation of these inputs suggests that RESET could be held low past the point of POR being deasserted with the only sonsequence being that most of the device remains in a reset state.
Can somebody please, please, please clarify these requirements. Essentially, I would like to be able to use RESET as a warm reset as described in the data sheet without having to deassert RESET prior to POR.
