Hi
I have to design an audio system where DM6467 McASP is the Master (Providing frame sync and data)
to a passive, oversampled DAC(CS4353, Cirrus Logic). The serial clock is provided by CDCE949.
McASP frame sync (for Tx) depends on
1) Serial Clock (SCLK)
2) No of slots/Frame
3) Slot size.
2 & 3 can be programmed thru McASP registers, and serial clock is fixed.
Currently SCLK =256KHz, no of slots=2 (I2S), slot size= 32 bits.
In this case frame Sync is 4 KHz. Surprisingly, the DAC gives output for a stream originally
sampled at 8 KHz, 16 bit/Sample. When I increase the frame sync to 8 KHz, by making slot size=16,
the play back is not normal (plays at double speed).
Why is it so?
I get some noise with the audio , when the frame sync is at 4 KHz.
How, in an audio system based on DM6467 , similar to the above ,
can support streams with multiple sampling rates? Is there any problem with the DAC I am using?
How DM6467-AIC33 combination is able support various sample rates? Pls help
Regards
JK