AM335x not booting from UART0

vasanth TP

Other Parts Discussed in Thread: AM3357, TPS65910

We have set UART0 to boot in our AM3357 Application board with sysboot configuration [15:0] = 01000000000010 (UART0, SPI0, NAND, NANDI2C).

We have used the same PMIC which is used in EVM (TPS65910), all supplies are stable power ON reset is de-asserted.

When i power-up my board, It should send out a "CC...." on terminal, but nothing is comming out. the UART0_TXD line is always High.

When we checked clkout1 by setting sysboot[5] to high it was 24MHz same as I/P to the processor.

We also checked VDDS_PLL_MPU, VDDS_PLL_DDR & VDDS_PLL_CORE_LCD power supply which is 1.85V.

What else should we do to get "CC...." on UART0. Any help or suggestion to solve this is appreciated.

Vasanth T P

over 8 years ago

0 Biser Gatchev-XID over 8 years ago

TI__Guru**** 393215 points

Please follow these guidelines: processors.wiki.ti.com/.../AM335x_board_bringup_tips

0 vasanth TP over 8 years ago in reply to Biser Gatchev-XID

Intellectual 460 points

We verified the following in our board and found them ok but still we do not see any activity of UART0

Setting SYSBOOT(5) = 1 enables CLKOUT1 and when set = 0 the CLKOUT1 is disabled. We checked on oscilloscope no considerable distortion in the waveform
Verified the power sequencing from PMIC is per the sequence specified in the datasheet of PMIC
All power rails are stable.
Measured the voltage at CAP_VDD_SRAM_CORE = 1.17V, CAP_VDD_SRAM_MPU = 1.16V, CAP_VBB_MPU = 1.06V and CAP_VDD_RTC = 1.08V
The reset is also stable after it is de-asserted. Before this all the power rails are stable

But still the problem exists. There is no activity on UART0.

Regards

Vasanth T P

0 Biser Gatchev-XID over 8 years ago in reply to vasanth TP

TI__Guru**** 393215 points

Do you have external pullpup resistors on the EMU0 and EMU1 signals? These signals should be pulled up externally to VDDSHV6 with 4.7kOhm resistors.

0 vasanth TP over 8 years ago in reply to Biser Gatchev-XID

Intellectual 460 points

Yes we have used pull up(4.7K) to VDDSHV6 for these signals

0 Biser Gatchev-XID over 8 years ago in reply to vasanth TP

TI__Guru**** 393215 points

Is this a single board or you see the same issue on multiple boards?

0 vasanth TP over 8 years ago in reply to Biser Gatchev-XID

Intellectual 460 points

We have assembled two boards and it is same in both of them.

Regards

Vasanth T P

0 Biser Gatchev-XID over 8 years ago in reply to vasanth TP

TI__Guru**** 393215 points

Do you have a JTAG connector on your board? It will be useful to connect a JTAG to see where the board hangs. Other than this, I'm afraid that we cannot be of much help without seeing the board schematic.

0 vasanth TP over 8 years ago in reply to Biser Gatchev-XID

Intellectual 460 points

We will connect JTAG and check.

0 vasanth TP over 8 years ago in reply to vasanth TP

Intellectual 460 points

Testing.zipWe tried to connect through JTAG XDS100V2, its connecting to the device but unable to connect to core. Please find the attached the screen shot of the error log, Also tried with JTAG lower frequency. Kindly guide us with this issue.

Regards

0 Biser Gatchev-XID over 8 years ago in reply to vasanth TP

TI__Guru**** 393215 points

Can you explain step-by-step what you are doing to connect to the target? These screenshots aren't very helpful.

0 vasanth TP over 8 years ago in reply to Biser Gatchev-XID

Intellectual 460 points

Testing1.zip1) Created CCXML file

2) Test connection JTAG fine

3) Launching the configuration

4) Connecting cortex A8 core - here it giver the error as unable to access DAP, Reset the device

0 Biser Gatchev-XID over 8 years ago in reply to vasanth TP

TI__Guru**** 393215 points

Doesn't look good. I'm sorry, but I can't suggest anything more without seeing the schematic.

0 vasanth TP over 8 years ago in reply to Biser Gatchev-XID

Intellectual 460 points

Please send me your mail ID, so that i can send the schematic to your mail.
Regards
Vasanth

0 Biser Gatchev-XID over 8 years ago in reply to vasanth TP

TI__Guru**** 393215 points

I have sent you a friend request with my e-mail.

0 Vageesh KM over 8 years ago in reply to Biser Gatchev-XID

Expert 1075 points

Dear Biser,

Its Vageesh from Avnet Bangalore supporting this customer.

1. I have connected their Custom board via XDS100v2 and CCS.
2. Created .ccxml file and selected AM3357 and provided TI AM335X EVM GEL file.
3. JTAG Test Connections are successfull.
3. Launched the selected Configuration and tried to Connect to the Target but it fails. Giving errors attached in previous chain.
4. XDS100v2 works fine with same procedure on AM335X EVM.
5. CCS is free version not full version.
6. Initially they populated only PMIC, tested and all out puts are as expected.
7. Then populated all MPU, Interface IC, Connectivity like WiFi, GSP/.GPRS etc., Then tried to Boot its giving error.

Kindly guide us where could be the issue.

0 Biser Gatchev-XID over 8 years ago in reply to Vageesh KM

TI__Guru**** 393215 points

I received the schematic. I will look through it tomorrow to see if there is anything wrong. From a quick look I had today one thing that worries me is that there are a lot of optional passives (resistors, ferrite beads), e.g. the ferrite beads on the VDDSHVx power supplies. It's not clear from the schematics which of these are mounted and which not. Especially on VDDSHVx only one ferrite bead should be mounted on each rail - either to 1.8V or to 3.3V, but never both of them.

0 vasanth TP over 8 years ago in reply to Biser Gatchev-XID

Intellectual 460 points

This section is as per EVM, We have mounted FB2,FB3, FB5, FB6, FB8, FB10 only one per each rail.

Regards

Vasanth

0 Biser Gatchev-XID over 8 years ago in reply to vasanth TP

TI__Guru**** 393215 points

OK, looked through the schematic. Here are my comments:

1. Both oscillator grounds should be connected to DGND (see Errata 1.0.30)
2. The external pullup R5 on WARMRSTn must be placed.
3. The VPP pin of AM335x must be left unconnected.
4. Remove R64. PMIC_PWR_EN is a 1.8V level signal.
5. Remove R41, place R68. TPS65910A3 requires short feedback line from L2/C94.
6. V3_3D seems to be floating. R98 must be placed.
7. V1_8D seems to be floating. R97 must be placed.
8. If you have an LCD connected to J6, check that it doesn't pull the SYSBOOT lines from their required levels.
9. Eliminate the voltage level monitor supervisory on AM335X_PORZ by removing R9 and check.
10. Eliminate the reset circuit on PMIC_RST by removing R424 and check.

0 vasanth TP over 8 years ago in reply to Biser Gatchev-XID

Intellectual 460 points

Hi Biser,

Thanks for your quick suggestion and our problem is solved after implementing these points,
except the first one (Both oscillator grounds should be connected to DGND) others are implemented.
Now the processor is sensing sysboot configuration [15:0] = 01000000000010 and sending "CC..." continuously on UART port continuously.
Should we connect the oscillator grounds to DGND?
Regards
Vasant T P

0 Biser Gatchev-XID over 8 years ago in reply to vasanth TP

TI__Guru**** 393215 points

Glad to hear this! About oscillator grounds, this is not imperative, but if you do a board revision it will be good to do it, as it will improve processor clocks noise immunity.

0 vasanth TP over 8 years ago in reply to Biser Gatchev-XID

Intellectual 460 points

Querye2e.zipDear Biser,

We have used MT41K512M16HA-107 DDR3L device from Micron, We have routed DDR3L Signals as per BeagleBoneBlack.

Only change is we have used 8Gb Device instead of 4Gb ( MT41K256M16HA-125 ).

We are using Code Composer Studio Version: 6.1.3.00034 and XDS100V2 jtag Debuger to load BeagleBoneBlack .gel file ,

which we have used the values provided by MT41K512M16HA-107 datasheet.

Problem faced while modifing DDR Address 0x800000000 = < Value >, It is not only modifing Offset 0x0, it is also manuplating offset 0x4,0x8 and 0xC.

Please find the attached files for your reference ( Querye2e.zip )

1. BeagleBlack_400Mhz_4GbDDR.gel

2. AM335x_DDR_register_calc_tool.xls

3. Console_Output.txt ( outputed console prints on Code Composer )

4. MemoryBrowser.png ( manuplating other offset 0x4, 0x8 and 0xc )

With Regards,

Vasanth

0 Biser Gatchev-XID over 8 years ago in reply to vasanth TP

TI__Guru**** 393215 points

This is a completely different issue from the one discussed on this thread. Please open a new thread for it.

0 vasanth TP over 8 years ago in reply to Biser Gatchev-XID

Intellectual 460 points

Ok,

Will open a new thread for it.
We are testing the same board which had UART0 boot issue, so thought it would be better to continue with the same thread.

Regards
Vasanth

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AM335x not booting from UART0