When the UART is set to 2 stop bits (9600, 8bit, No parity) on a 485 bus using CSTOPB through the Linux OMAP driver, we get frame and break errors if the received frame sent by a client has only 1 stop bit. The tx is correctly sending 2 stop bits. If the received frame has 2 stop bits, everything is fine and we get no errors. This seems to work differently than other UARTS, where the received stop bit timing seems to be ignored, and when set to 2 stop bits, they can receive both 1 or 2 stop bits without error. That seems to allow for more compatibility between devices on a shared 485 bus.
Is this expected behavior on the AM3354 for the rx to require the same number of stop bits that the tx is set to? Or are there other configuration settings that should be looked at that might avoid the frame errors when receiving 1 stop bit frames but still transmit with 2 stop bits?
The SPRUH730 technical reference document has the following line for Reception which seems to imply that only the transition is being looked at:
"1 STOP bit (any other STOP bits transferred with the above data are not detected)"
I did test setting the UART to 1 stop bit, and in that case, it will receive both 1 stop bit and 2 stop bit frames without error.
