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SPI Configuration Guidence

Hoffiz
Expert 1670 points
Other Parts Discussed in Thread: SYSBIOS, OMAPL138

Hi,

I've been trying to plan how to configure my spi interface on the omapl137 to control a SPI ADC. Before I get into the details, I have some general high level questions about the SPI module.

What initiates a read? Do I need to write a dummy value to SPIDAT1?

If I need to toggle a CNV pin every 1.66 us what approach would you suggest?

I'm using SYSBIOS and this is intended for the DSP side of the omap.

Regards

  • 0
    TI__Guru** 116100 points
    Yes, you should write dummy value to initiate the transfer in ADC.
    You can use timer or PWM or manual set/clear a bit GPIO for 602KHz (1.66us)
  • 0 in reply to Titusrathinaraj Stalin
    Expert 1670 points

    Thanks, if you don't mind I still have a few more questions before closing the thread.

    To make sure I got this right(sorry I don't have a logic analyzer to test it), even if the SPI module on the dsp is enable, SCLK does not run until you write a value from the omap, which is in master mode, to the ADC.

    By enable I'm referring to this line of code that, from the omapl138 Starter-Ware,

    /* Enable SPI communication */

    SPIEnable(SOC_SPI_0_REGS);

  • 0 in reply to Hoffiz
    TI__Guru** 116100 points
    Yes, you can't see any SCLKs until you do read/write transactions on SPI.
  • 0 in reply to Titusrathinaraj Stalin
    Expert 1670 points

    Thank you Titus.

    I'm trying to figure out how to best interface an ADC to the omapl137 spi module. I'm leaning towards a 5 pin mode. Is there any other reference I can look at to better understand specific details of SPI implementations. A google search return very basic theory, and I hope I'm passed that :)

    SPRUH92D–March 2013–Revised September 2016
    29.2.10 SPI Operation: 5-Pin Mode

    My ADC has a CNV pin that I need to toggle at 600 KHz, wait a little bit and then transmit a dummy value to pull the ADC converted data from its register to the SPI RXBUF on the omap. The omap is the master the adc the slave.

    Here are what I think are my options:
    1- If in 4-pin option with SPIx_ENA, will this trigger a interrupt every time the SPI slave needs to be service?
    2- I'm thinking on using the mode where a transmission of such dummy value to the ADC is control by either the SPIx_ENA or C2TDELAY.  Is my assumption correct that, in both cases, I will be able to prime the tx buf and control through hardware when it gets written, which will pull the data from the ADC register?