Hi,
We have a custom board with the K2L processor and 2GB of DDR3 memory (using also ECC so there are 5 DDR3 chips on board). DDR3 is running @ 1600MHz. We have tested the memory operation and the interface is fully functional - long term testing shows that there is not even a single error in write / read testing. Note that we have tested whole memory by making writes and reads for the whole DDR3 address range.
The PGR0 register shows only one failure - bit 26, read eye training error is set. What can be causing this and should we worry about this even if the interface is working properly? The read eye training is done, bit 10 is set.
Also, PGR0 shows that write eye training is not done (bit 11 is not set). The bit 27 is 0 but this may be zero because the write eye training is not done (?)....
