Other Parts Discussed in Thread: EK-TM4C129EXL
Hi there,
EK-TM4C129EXL
CCS 6.2
TI-RTOS 2.16.0.08
XDC tools 3.32.1.22
I do have a problem with SPI 0. So it is initialized as a slave and waits for the master. Whenever data comes in a system hangs and then only reset helps.
Here is the code:
SPI_Handle slave_0_Spi;
SPI_Transaction slave_0_Transaction;
// in the main.c:
Int main()
{
Board_initGeneral();
Board_initGPIO();
Board_initSPI();
/* Start BIOS */
BIOS_start();
return (0);
}
// Call-back Fxn:
void slaveSPITransferStatus(SPI_Handle handle, SPI_Transaction * transaction)
{
Semaphore_post(semSpiFrameReceived);
}
// SPI Slave task:
void SPIslaveTaskFxn(void)
{
SPI_Params slaveSpiParams;
UInt16 i;
/* Initialize SPI handle with slave mode */
SPI_Params_init(&slaveSpiParams);
slaveSpiParams.transferCallbackFxn = slaveSPITransferStatus;
slaveSpiParams.transferMode = SPI_MODE_CALLBACK;//SPI_MODE_BLOCKING;
slaveSpiParams.mode = SPI_SLAVE;
slave_0_Spi = SPI_open(EK_TM4C129EXL_SPI0, &slaveSpiParams);
if (slave_0_Spi == NULL) {
System_abort("Error initializing SPI\n");
}
else {
System_printf("SPI slave 0 initialized\n");
}
/* Initialize slave SPI transaction structure */
slave_0_Transaction.count = SPI_MSG_LENGTH;
//slave_0_Transaction.txBuf = (Ptr)slave_0_TxBuffer;
slave_0_Transaction.rxBuf = (Ptr)slave_0_RxBuffer;
SPI_transfer(slave_0_Spi, &slave_0_Transaction);
System_flush();
while(1)
{
Semaphore_pend(semSpiFrameReceived ,BIOS_WAIT_FOREVER);
System_printf("Slave 0 RX : ");
/* Print contents of slave receive buffer */
for (i = 0; i < SPI_MSG_LENGTH; i++)
{
System_printf("%x ",slave_0_RxBuffer[i]);
}
System_printf("\n");
System_flush();
SPI_transfer(slave_0_Spi, &slave_0_Transaction);
}
}
}
typedef enum EK_TM4C129EXL_SPIName {
EK_TM4C129EXL_SPI0 = 0,
EK_TM4C129EXL_SPI1,
EK_TM4C129EXL_SPI2,
EK_TM4C129EXL_SPI3,
EK_TM4C129EXL_SPICOUNT
} EK_TM4C129EXL_SPIName;
// ======== EK_TM4C129EXL_initSPI ========
void EK_TM4C129EXL_initSPI(void)
{
/* SSI0 */
SysCtlPeripheralEnable(SYSCTL_PERIPH_SSI0);
GPIOPinConfigure(GPIO_PA2_SSI0CLK);
GPIOPinConfigure(GPIO_PA3_SSI0FSS);
GPIOPinConfigure(GPIO_PA4_SSI0XDAT0);
GPIOPinConfigure(GPIO_PA5_SSI0XDAT1);
GPIOPinTypeSSI(GPIO_PORTA_BASE, GPIO_PIN_2 | GPIO_PIN_3 |
GPIO_PIN_4 | GPIO_PIN_5);
/* SSI1 */
SysCtlPeripheralEnable(SYSCTL_PERIPH_SSI1);
GPIOPinConfigure(GPIO_PB5_SSI1CLK);
GPIOPinConfigure(GPIO_PB4_SSI1FSS);
GPIOPinConfigure(GPIO_PE4_SSI1XDAT0);
GPIOPinConfigure(GPIO_PE5_SSI1XDAT1);
GPIOPinTypeSSI(GPIO_PORTB_BASE, GPIO_PIN_4 | GPIO_PIN_5);
GPIOPinTypeSSI(GPIO_PORTE_BASE, GPIO_PIN_4 | GPIO_PIN_5);
/* SSI2 */
/*
* NOTE: TI-RTOS examples configure pins PD0 & PD1 for SSI2 or I2C7. Thus,
* a conflict occurs when the I2C & SPI drivers are used simultaneously in
* an application. Modify the pin mux settings in this file and resolve the
* conflict before running your the application.
*/
SysCtlPeripheralEnable(SYSCTL_PERIPH_SSI2);
GPIOPinConfigure(GPIO_PD3_SSI2CLK);
GPIOPinConfigure(GPIO_PD2_SSI2FSS);
GPIOPinConfigure(GPIO_PD1_SSI2XDAT0);
GPIOPinConfigure(GPIO_PD0_SSI2XDAT1);
GPIOPinTypeSSI(GPIO_PORTD_BASE, GPIO_PIN_0 | GPIO_PIN_1 |
GPIO_PIN_2 | GPIO_PIN_3);
/* SSI3 */
SysCtlPeripheralEnable(SYSCTL_PERIPH_SSI3);
GPIOPinConfigure(GPIO_PQ0_SSI3CLK);
GPIOPinConfigure(GPIO_PQ1_SSI3FSS);
GPIOPinConfigure(GPIO_PQ2_SSI3XDAT0);
GPIOPinConfigure(GPIO_PQ3_SSI3XDAT1);
GPIOPinTypeSSI(GPIO_PORTQ_BASE, GPIO_PIN_0 | GPIO_PIN_1 |
GPIO_PIN_2 | GPIO_PIN_3);
EK_TM4C129EXL_initDMA();
SPI_init();
}
const SPITivaDMA_HWAttrs spiTivaDMAHWAttrs[EK_TM4C129EXL_SPICOUNT] = {
{
.baseAddr = SSI0_BASE,
.intNum = INT_SSI0,
.intPriority = (~0),
.scratchBufPtr = &spiTivaDMAscratchBuf[0],
.defaultTxBufValue = 0,
.rxChannelIndex = UDMA_CHANNEL_SSI0RX,
.txChannelIndex = UDMA_CHANNEL_SSI0TX,
.channelMappingFxn = uDMAChannelAssign,
.rxChannelMappingFxnArg = UDMA_CH10_SSI0RX,
.txChannelMappingFxnArg = UDMA_CH11_SSI0TX
},
{
.baseAddr = SSI1_BASE,
.intNum = INT_SSI1,
.intPriority = (~0),
.scratchBufPtr = &spiTivaDMAscratchBuf[1],
.defaultTxBufValue = 0,
.rxChannelIndex = UDMA_CHANNEL_SSI1RX,
.txChannelIndex = UDMA_CHANNEL_SSI1TX,
.channelMappingFxn = uDMAChannelAssign,
.rxChannelMappingFxnArg = UDMA_CH24_SSI1RX,
.txChannelMappingFxnArg = UDMA_CH25_SSI1TX
},
{
.baseAddr = SSI2_BASE,
.intNum = INT_SSI2,
.intPriority = (~0),
.scratchBufPtr = &spiTivaDMAscratchBuf[2],
.defaultTxBufValue = 0,
.rxChannelIndex = UDMA_SEC_CHANNEL_UART2RX_12,
.txChannelIndex = UDMA_SEC_CHANNEL_UART2TX_13,
.channelMappingFxn = uDMAChannelAssign,
.rxChannelMappingFxnArg = UDMA_CH12_SSI2RX,
.txChannelMappingFxnArg = UDMA_CH13_SSI2TX
},
{
.baseAddr = SSI3_BASE,
.intNum = INT_SSI3,
.intPriority = (~0),
.scratchBufPtr = &spiTivaDMAscratchBuf[3],
.defaultTxBufValue = 0,
.rxChannelIndex = UDMA_SEC_CHANNEL_TMR2A_14,
.txChannelIndex = UDMA_SEC_CHANNEL_TMR2B_15,
.channelMappingFxn = uDMAChannelAssign,
.rxChannelMappingFxnArg = UDMA_CH14_SSI3RX,
.txChannelMappingFxnArg = UDMA_CH15_SSI3TX
}
};
const SPI_Config SPI_config[] = {
{
.fxnTablePtr = &SPITivaDMA_fxnTable,
.object = &spiTivaDMAObjects[0],
.hwAttrs = &spiTivaDMAHWAttrs[0]
},
{
.fxnTablePtr = &SPITivaDMA_fxnTable,
.object = &spiTivaDMAObjects[1],
.hwAttrs = &spiTivaDMAHWAttrs[1]
},
{
.fxnTablePtr = &SPITivaDMA_fxnTable,
.object = &spiTivaDMAObjects[2],
.hwAttrs = &spiTivaDMAHWAttrs[2]
},
{
.fxnTablePtr = &SPITivaDMA_fxnTable,
.object = &spiTivaDMAObjects[3],
.hwAttrs = &spiTivaDMAHWAttrs[3]
},
{NULL, NULL, NULL}
};
What am I missing here?
Thanks.
Stan