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EDMA3 Request Channel hang

John Tan
Intellectual 430 points

Hello.

I was trying out the EDMA3 in OMAP_L138 and it was working as expected most times where data are transferred correctly.
There are times where it will hang indefinitely at the EDMA3_DRV_requestChannel function when I set it up again after cleaning up from the previous iteration.
I have no idea if I left out something important while setting up.

Please assist. Thanks.

My steps are the following for setting it up: 
1. initialize the edma_DriverInit();
2. request for edma3_drv_requestchannel with TCC and ChnID of EDMA3_DRV_HW_CHANNEL_EVENT_23. Both Channel Event is link to the hardware that was provided to me. 
3. Set the Src/Dest Params and Indexes
4. Set the TransferParams and OptFields
5. Enable transfer for event trigger.

My steps are the following for clean up:
1. disable the event trigger by using EDMA3_DRV_distableTransfer
2. free the channel using EDMA3_DRV_freeChannel method
3. De-init the edma3 with edma_DriverDeinit();

  • 0
    TI__Genius 12805 points

    Will you be kind and tell us what software you use - name, version, where did you downloaded it from

    If I understand correctly, you follow the steps from above to start EDMA,  it works.   Then you clean up, fine, and then you try to EDMA again and it does not work?   Do I understand it correctly? 

    You can try and debug the code. In the User Guide (http://www.ti.com/lit/ds/symlink/omap-l138.pdf)  table 6-15 the addresses of the EDMACC control registers are given (for EDMA 0 and EDMA 1). Can you check to see if the correct bit in the event register is set before and after you try to set the second transfer?


    Ran

  • 0 in reply to ran35366
    Intellectual 430 points

    Hello Ran

    Thanks for the response.

    I am using the ti-dvsdk_omapl138-evm_4_02_00_06 that I download from TI. The edma3 is from edma3lld_01_11_00_03.

    Yes. you are right. I followed the steps from above to start EDMA, it works then in the next instance it will not work again.

    I have not tested out the EDMACC control registers method yet. 

    I have managed to know how to reproduce the issue.
    It happens that I did cleanup while the transfer is still ongoing.
    Then in the following iteration, I am not able to request again.
    It seems like the clean-up is not able to reset to a brand new start.

    I have tried to EDMA3_DRV_clearErrorBits as well but it will still not work.
    All the functions will return EDMA3_DRV_SOK.

  • 0 in reply to John Tan
    TI__Genius 12805 points

    One more question -

    what type of event generation the code uses - the complete event or the intermediate event (in the OPT word, what bit is set, bit 20 or bit 21

    From what you say it looks like the cleaning clears the trigger for the second transfer or disable the transfer. 

    here is what I suggest -

    I will send you a program that use EDMA directly, step by step with out any drivers.  The program set the registers that needs to be set before transfer.

    What I suggest is that you look at what registers need to be set and how, and then run your first transfer, run the clearing, and before you start the second transfer, look and see what registers is not set properly.  Let's try this

    Ran/cfs-file/__key/communityserver-discussions-components-files/791/3683.edmaBareMetal2.zip