Hi,
There is a question about GPIO3 pin processing of PMIC(TPS65218).
There is the following description to the data sheet of TPS65218.
7.3.1.14 I/O Configuration
GPIO3:
General-purpose, open-drain output controlled by GPO3 user bit or sequencer
Reset input-signal for DCDC1 and DCDC2
DC12_RST bit of CONFIG2 Register is set to 1 in RESET and is chosen as follows.
GPIO3 is configured as warm-reset input to DCDC1 and DCDC2
With following document and AM437x EVM and AM437x SK board, it becomes the open processing.
Figure 2. Connection Diagram for TPS65218 and AM437x
www.tij.co.jp/.../slvuaa9.pdf
Our customer doesn't use warm reset.
It is thought that it becomes the low recognition when a noise occurs when it is open processing, and reset may occur.
Should the processing of right pins make pulling up?
Or it is open-drain output, and does GPIO3 not have any problem by pin processing of open after sequencer start because it is described to a data sheet with "General-purpose, open-drain output controlled by user bit or sequencer"?
Best Regards,
Shigehiro Tsuda
