Hello
I am interested in implementing a minimal-component C6000 DSP solution. In other words, I would like to implement a DSP solution without requiring external SDRAMs or boot flash devices (NAND, NOR, SD, etc).
Instead, the DSP will be connected to a Xilinx FPGA as a co-processor to the FPGA and the FPGA will be responsible for loading the application DSP code into one of the embedded memories inside the DSP.
Our application code is generally quiet small (~ 128KB) and needs to be loaded very quickly on the fly by the FPGA.
I am specifically interested in the following DSP devices:
1) TMS320C6655: 1MB shared memory and 1MB L2 cache
2) TMS320C6652: 1MB L2 cache
3) TMS320C6748: 128KB shared memory, 256KB L2 cache
My question is as follows:
1) If our application code is small enough, can it be programmed into one of the embedded memories of the DSP and then the DSP executes solely out of the instruction code stored in the shared memory? Or do the above DSP devices require external SDRAM for code storage and execution?
I have had a look at microcontrollers as well (specifically the TI Delfino range) and am also investigating those devices as an alternative. I would still like to know whether the above is possible for C6000 DSP devices.
Many thanks
Gavin
