Jacinto LCD bring up

Annamalai Lakshmanan88

Mastermind 6285 points

We are trying to bring up an LVDS based LCD in Jacinto Platform based on new Linux 4.4 kernel.

the hardware connection is J6->FPGA->LVDS->LCD

modetest gives connector ID as 32

I ran fliptest utility using above connector to test integrity ./fliptest -s 32:1

there is no error in the kernel, but there is no display in the LCD. how do we debug this scenatio.

(can we dump the raw frames, see any register settings) etc.out of display controller to ensure data going out of DISPC is okay

appreciate input.

over 9 years ago

0 Annamalai Lakshmanan88 over 9 years ago

Mastermind 6285 points

we are using linux kernel 4.4, i dont think /dev/fb0 is support (not sure), and many sysfs entries like overlay0, overlay1 are not present, please provide a simplified debug for this problem

0 Mariya Petkova over 9 years ago in reply to Annamalai Lakshmanan88

TI__Expert 4885 points

Hi,

The question is forwarded to an expert. The comment will be post directly here.

Regards,
Mariya

0 Venkat Mandela over 9 years ago in reply to Mariya Petkova

TI__Expert 5970 points

Hi,

Please see this thread and check if it helps.

e2e.ti.com/.../1890783

If it does not, please post your device tree to this thread.

regards,
Venkat

0 Annamalai Lakshmanan88 over 9 years ago in reply to Venkat Mandela

Mastermind 6285 points

please find my device tree here, let know your comments:

lcd2: display@0 {
compatible = "gmrsi_fpga";
label = "lcd";
status = "okay";
port {
lcd_in2: endpoint {
remote-endpoint = <&dpi_out2>;
};
};
};
lcd3: display@1 {
compatible = "gmrsi_fpga";
label = "lcd";
status = "okay";
port {
lcd_in3: endpoint {
remote-endpoint = <&dpi_out3>;
};
};
};

dss: dss@58000000 {
compatible = "ti,dra7-dss";
/* 'reg' defined in dra72x.dtsi and dra74x.dtsi */
/* 'clocks' defined in dra72x.dtsi and dra74x.dtsi */
status = "disabled";
ti,hwmods = "dss_core";
/* CTRL_CORE_DSS_PLL_CONTROL */
syscon-pll-ctrl = <&scm_conf 0x538>;
#address-cells = <1>;
#size-cells = <1>;
ranges;

dispc@58001000 {
compatible = "ti,dra7-dispc";
reg = <0x58001000 0x1000>;
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "dss_dispc";
clocks = <&dss_dss_clk>;
clock-names = "fck";
/* CTRL_CORE_SMA_SW_1 */
syscon-pol = <&scm_conf 0x534>;
};
};

0 Venkat Mandela over 9 years ago in reply to Annamalai Lakshmanan88

TI__Expert 5970 points

Hi,

Thanks for sharing the dts fragment. I will look into it and respond.

regards,
Venkat

0 Annamalai Lakshmanan88 over 9 years ago in reply to Venkat Mandela

Mastermind 6285 points

thanks we figured outinternal issue

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Jacinto LCD bring up