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AM335x pinmux tool GPMC IO set

Guru 15520 points


Hi,

I have a question about TI PinMux(TI Cloud Tools) for AM335x ZCZ package.

We are going to use GPMC as "Multiplexed Address Data 16-Bit Device".
In AM335x TRM(spruhh73o) page.561 "Table 7-5. GPMC Pin Multiplexing Options",
following GPMC signals(not pins) are correspond to upper memory address.
////////////////////////
gpmc_a[27] - A26
gpmc_a[10] - A25
gpmc_a[9] -  A24
gpmc_a[8] -  A23
gpmc_a[7] -  A22
gpmc_a[6] -  A21
gpmc_a[5] -  A20
gpmc_a[4] -  A19
gpmc_a[3] -  A18
gpmc_a[2] -  A17
gpmc_a[1] -  A16
////////////////////////

So, if GPMC_A[10:1]"pin" are used in Multiplexed Address Data,
I understand that PINMUX mode of these pins should be set to mode0.

But in PINMUX tools, it seem there are no I/O Set are provided
to realize the above PINMUX settings.

Which I/O set provided in PINMUX Tools are for "Multplexed Address Data 16-Bit Device"?

best regards,
g.f.

  • Hi,

    High address pins for Multiplexed Address Data are:

    pin V14 - gpmc_a1 - address A17 - mode 4
    pin U14 - gpmc_a2 - address A18 - mode 4
    pin T14 - gpmc_a3 - address A19 - mode 4
    pin R14 - gpmc_a4 - address A20 - mode 4
    pin V15 - gpmc_a5 - address A21 - mode 4
    pin U15 - gpmc_a6 - address A22 - mode 4
    pin T15 - gpmc_a7 - address A23 - mode 4
    pin V16 - gpmc_a8 - address A24 - mode 4
    pin U16 - gpmc_a9 - address A25 - mode 4
    pin T16 - gpmc_a10 - address A26 - mode 4

    This is IO set 36 without pin R13, and counting addresses starting with A1.
  • Hi Biser,

    Thank you for the reply.

    Mode4 of above pins will be following signal:
    pin V14 : GPMC signal gpmc_a17
    pin U14: GPMC signal gpmc_a18
    pin T14 : GPMC signal gpmc_a19
    pin R14 : GPMC signal gpmc_a20
    pin V15 : GPMC signal gpmc_a21
    pin U15 : GPMC signal gpmc_a22
    pin T15 : GPMC signal gpmc_a23
    pin V16 : GPMC signal gpmc_a24
    pin U16 : GPMC signal gpmc_a25
    pin T16 : GPMC signal gpmc_a26

    This GPMC signal doesn't match to the signal written in the TRM(spruh73o) page.561 Table 7-5 GPMC Pin Multiplexing Options.
    Also, gpmc_a26 isn't used but gpmc_a27 is used for Memory address A26 in TRM Table 7-5.

    About 3 years ago, I heard from local TI FAE that setting the PinMux of above pins to mode4 will not work as address signal
    and it need to be set to mode0 to work as upper address signal in "Multiplexed Address/Data 16bit mode".

    best regards,
    g.f.
  • See Note 1 below Table 7-5.
  • Are you saying following note?
    ///////////////////////////////////////////
    1) The values in this column represent the signals on the memory. Be aware that some 16-bit memories may label the address
    lines differently. Some label the LSB as A0, while others use A1 for the LSB. These columns assume the LSB is A0.
    ///////////////////////////////////////////

    This Note(1) are talking about memory address label not GPMC signal.
    I want to know the correct GPMC signal for upper address and appropriate I/O set.
    As I mentioned above, I heard that PinMux Mode4 of above GPMC Pins can not be used for Multiplex address/data mode
    and it need to be set to mode0.
    But there are no I/O set which using mode 0 for upper address.

    best regards,
    g.f.
  • g.f. said:
    As I mentioned above, I heard that PinMux Mode4 of above GPMC Pins can not be used for Multiplex address/data mode
    and it need to be set to mode0.

    I don't know where you heard this. I don't know about any such issue. And yes, I was talking about the same note.

  • Hi Biser,

    Thank you for the reply
    I will ask to my local FAE once more about why setting the PINMUX to mode0.

    best regards,
    g.f.