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Shared memory between ARM(QNX) and DSP(sysbios)

Other Parts Discussed in Thread: SYSBIOS

How can I share memory between DSP(Sysbios) and ARM(QNX)?

I have board TDA2eX and host OS on arm Cortex A15 is QNX. But I cannot find any examples of using HeapBufMP or something else for sendig big data from arm to dsp. I need send more than 1 Mb data.

if I have several way for sending it what is the fastest?

  • Hi, Maxim,

    I have notified an expert to comment here.

    Regards,
    Mariya
  • Fastest is to send 32 bit pointer pointing to that data. You can use Notify module and manage translations on your own.

    Regards,

    Yogesh.

  • I understand, bu how can I allocate memmory in shared region for both?
    it seems, that malloc won't work correctly.
  • You can use SharedRegion module which allows you to create heap out of shared region. You can pass the handle to that heap to Memory_alloc(). I dont know if QNX ipc supports this. You can also choose to have your own allocator that maps and allocates physically contiguous chunk of memory. In either case one core has to allocate and the other has to map and use it or use it directly.
  • When I tried to use Memory_alloc() and SharedRegion I got memmory fault on qnx side:

    in .cfg file on dsp
    SharedRegion.setEntryMeta(0,
    { base: 0xA0000000 + 0x01000000,
    len: 0x00010000,
    ownerProcId: 4,
    isValid: true,
    // cacheEnable: cacheEnabled,
    // cacheLineSize: cacheLineSize, /* Aligns allocated messages to a cache line */
    createHeap: true,
    name: "shared_mem",
    });


    in .c file on dsp
    msg->image = (unsigned char* )Memory_alloc(SharedRegion_getHeap(0), 100, 128, NULL);

    in .c on arm

    memset...
    and I got memory fault.

    Mb I should translate virtual adress to physical and vice versa?
  • Unfortunately SharedRegion API not supported on HLOS (QNX), its only for sysbios ipc so it will work on dsp to dsp/ipu but not for QNX + A15. Do you have access to QNX InfoAdas package? There you have Shared region allocation modules based on who owns shared region.

    IPU owned Shared Region:

    This is currently support by the QNX Vision SDK (QNX InfoADAS) where the memory buffer allocated and send received by IPU/DSP is mapped &  translated to QNX virtual address to be used on the A15 QNX side using QNX IPC.

     

    A15(QNX) owned  shared region:

    Using the shmemAllocator utility that is provided as part of QNX IPC Release, we share A15 allocated shared buffer with IPU and DSP.

    SharedMemAllocator module which can be used to allocate from a pre-defined pool of memory which is mapped to the remote core in the Resource Table. Typically the host (QNX app) allocates the buffer using SharedMemAllocator and sends the physical address to the remote core, who then uses Resource_physToVirt() to get the remote core virtual address for the buffer.

     

  • Thank you for your answer.
    One more question:

    if I use A15(QNX) owned shared region, than I should

    1)change packages/ti/ipc/remoteproc/rsc_table_vayu_dsp.h
    ....

    #define DSP_MEM_IOBUFS 0x80000000 // This is the virtual address, can be anywhere of your choosing
    #define PHYS_MEM_IOBUFS 0xBA300000 // This must match the base of the reserved physical block
    #define DSP_MEM_IOBUFS_SIZE (SZ_1M * 90) // This must match the size of the reserved physical block

    ....//to struct my_resource_table ti_ipc_remoteproc_ResourceTable = {
    {
    TYPE_DEVMEM,
    DSP_MEM_IOBUFS, PHYS_MEM_IOBUFS,
    DSP_MEM_IOBUFS_SIZE, 0, 0, "DSP_MEM_IOBUFS",
    },
    ...

    2) allocate memory using shmemAllocator at this physical address PHYS_MEM_IOBUFS

    3) and then I can use Resource_physToVirt() on dsp and then I can get correct pointer to address at adress space of dsp

    Is it correct?

  • Yes, those should be the correct steps.

    In addition, please note that you will need to tell QNX not to use this memory (if it isn't already done). You can find info on how to do this from the startup command here: processors.wiki.ti.com/.../IPC_3.x_FAQ


    Thanks,
    Angela
  • My fault was that memory map of my qnx image was not default.
    processors.wiki.ti.com/.../IPC_3.x_FAQ QNX build desribes about changing memory map