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AM335x issue bringing up PHYs

Hi,

I have a custom board with two Broadcom BCM5461S PHYs connected by RGMII. I compiled in the driver and they seem to get detected fine during bootup, but there is actually no connection. I can't get an IP address using dhcpc and setting the IP manually doesn't make it access the network either.

I do get Linux messages when I disconnect/reconnect the cable about the link being up/down. These are coming through MDIO, correct? Also, looking at the lights on my external switch, it seems like the PHYs are negotiating fine.

So, I'm thinking it might just be something wrong with the RGMII configuration, but everything looks right to me.

I attached the entire dmesg log of the bootup. I'm also attaching my devicetree files.

On another note (much less important than this PHY issue), my USB ports are not coming up. I have not looked into this yet, but I assume there is something missing in my devicetree.

[    0.000000] Booting Linux on physical CPU 0x0
[    0.000000] Initializing cgroup subsys cpu
[    0.000000] Initializing cgroup subsys cpuacct
[    0.000000] Linux version 4.4.19-gdb0b54cdad (ferdi@ferdi-linux2) (gcc version 5.3.1 20160113 (Linaro GCC 5.3-2016.02) ) #24 PREEMPT Thu Nov 10 11:29:21 MST 2016
[    0.000000] CPU: ARMv7 Processor [413fc082] revision 2 (ARMv7), cr=10c5387d
[    0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
[    0.000000] Machine model: TI AM335x BeagleBone Black
[    0.000000] cma: Reserved 24 MiB at 0x9e800000
[    0.000000] Memory policy: Data cache writeback
[    0.000000] On node 0 totalpages: 131072
[    0.000000] free_area_init_node: node 0, pgdat c0944f94, node_mem_map de36d000
[    0.000000]   Normal zone: 1152 pages used for memmap
[    0.000000]   Normal zone: 0 pages reserved
[    0.000000]   Normal zone: 131072 pages, LIFO batch:31
[    0.000000] CPU: All CPU(s) started in SVC mode.
[    0.000000] AM335X ES2.1 (sgx neon )
[    0.000000] pcpu-alloc: s0 r0 d32768 u32768 alloc=1*32768
[    0.000000] pcpu-alloc: [0] 0 
[    0.000000] Built 1 zonelists in Zone order, mobility grouping on.  Total pages: 129920
[    0.000000] Kernel command line: console=ttyO0,115200n8 root=PARTUUID=acd359f9-02 rw rootfstype=ext4 rootwait
[    0.000000] PID hash table entries: 2048 (order: 1, 8192 bytes)
[    0.000000] Dentry cache hash table entries: 65536 (order: 6, 262144 bytes)
[    0.000000] Inode-cache hash table entries: 32768 (order: 5, 131072 bytes)
[    0.000000] Memory: 484696K/524288K available (6551K kernel code, 316K rwdata, 2328K rodata, 268K init, 265K bss, 15016K reserved, 24576K cma-reserved, 0K highmem)
[    0.000000] Virtual kernel memory layout:
                   vector  : 0xffff0000 - 0xffff1000   (   4 kB)
                   fixmap  : 0xffc00000 - 0xfff00000   (3072 kB)
                   vmalloc : 0xe0800000 - 0xff800000   ( 496 MB)
                   lowmem  : 0xc0000000 - 0xe0000000   ( 512 MB)
                   pkmap   : 0xbfe00000 - 0xc0000000   (   2 MB)
                   modules : 0xbf000000 - 0xbfe00000   (  14 MB)
                     .text : 0xc0008000 - 0xc08b4004   (8881 kB)
                     .init : 0xc08b5000 - 0xc08f8000   ( 268 kB)
                     .data : 0xc08f8000 - 0xc09473d0   ( 317 kB)
                      .bss : 0xc09473d0 - 0xc0989b18   ( 266 kB)
[    0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
[    0.000000] Preemptible hierarchical RCU implementation.
[    0.000000] 	Build-time adjustment of leaf fanout to 32.
[    0.000000] NR_IRQS:16 nr_irqs:16 16
[    0.000000] IRQ: Found an INTC at 0xfa200000 (revision 5.0) with 128 interrupts
[    0.000000] OMAP clockevent source: timer2 at 25000000 Hz
[    0.000012] sched_clock: 32 bits at 25MHz, resolution 40ns, wraps every 85899345900ns
[    0.000032] clocksource: timer1: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 76450417870 ns
[    0.000041] OMAP clocksource: timer1 at 25000000 Hz
[    0.000171] clocksource_probe: no matching clocksources found
[    0.000322] Console: colour dummy device 80x30
[    0.000343] WARNING: Your 'console=ttyO0' has been replaced by 'ttyS0'
[    0.000348] This ensures that you still see kernel messages. Please
[    0.000353] update your kernel commandline.
[    0.000369] Calibrating delay loop... 1036.28 BogoMIPS (lpj=5181440)
[    0.089283] pid_max: default: 32768 minimum: 301
[    0.089392] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes)
[    0.089402] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes)
[    0.089986] Initializing cgroup subsys io
[    0.090012] Initializing cgroup subsys memory
[    0.090044] Initializing cgroup subsys devices
[    0.090059] Initializing cgroup subsys freezer
[    0.090071] Initializing cgroup subsys perf_event
[    0.090081] Initializing cgroup subsys pids
[    0.090105] CPU: Testing write buffer coherency: ok
[    0.090450] Setting up static identity map for 0x80008200 - 0x80008258
[    0.092191] devtmpfs: initialized
[    0.101197] VFP support v0.3: implementor 41 architecture 3 part 30 variant c rev 3
[    0.113144] omap_hwmod: debugss: _wait_target_disable failed
[    0.167381] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
[    0.169252] pinctrl core: initialized pinctrl subsystem
[    0.170433] NET: Registered protocol family 16
[    0.172134] DMA: preallocated 256 KiB pool for atomic coherent allocations
[    0.199288] cpuidle: using governor ladder
[    0.229279] cpuidle: using governor menu
[    0.232612] gpiochip_add: registered GPIOs 0 to 31 on device: gpio
[    0.232881] OMAP GPIO hardware version 0.1
[    0.233514] gpiochip_add: registered GPIOs 32 to 63 on device: gpio
[    0.234165] gpiochip_add: registered GPIOs 64 to 95 on device: gpio
[    0.234775] gpiochip_add: registered GPIOs 96 to 127 on device: gpio
[    0.241195] hw-breakpoint: debug architecture 0x4 unsupported.
[    0.275992] edma 49000000.edma: TI EDMA DMA engine driver
[    0.276313] of_get_named_gpiod_flags: can't parse 'gpio' property of node '/fixedregulator@0[0]'
[    0.278809] omap_i2c 44e0b000.i2c: could not find pctldev for node /ocp/l4_wkup@44c00000/scm@210000/pinmux@800/pinmux_i2c0_pins, deferring probe
[    0.278930] media: Linux media interface: v0.10
[    0.278980] Linux video capture interface: v2.00
[    0.279036] pps_core: LinuxPPS API ver. 1 registered
[    0.279042] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
[    0.279065] PTP clock support registered
[    0.279110] EDAC MC: Ver: 3.0.0
[    0.280204] omap-mailbox 480c8000.mailbox: omap mailbox rev 0x400
[    0.280475] Advanced Linux Sound Architecture Driver Initialized.
[    0.281452] clocksource: Switched to clocksource timer1
[    0.290210] NET: Registered protocol family 2
[    0.290872] TCP established hash table entries: 4096 (order: 2, 16384 bytes)
[    0.290917] TCP bind hash table entries: 4096 (order: 2, 16384 bytes)
[    0.290953] TCP: Hash tables configured (established 4096 bind 4096)
[    0.291018] UDP hash table entries: 256 (order: 0, 4096 bytes)
[    0.291034] UDP-Lite hash table entries: 256 (order: 0, 4096 bytes)
[    0.291155] NET: Registered protocol family 1
[    0.291567] RPC: Registered named UNIX socket transport module.
[    0.291581] RPC: Registered udp transport module.
[    0.291587] RPC: Registered tcp transport module.
[    0.291592] RPC: Registered tcp NFSv4.1 backchannel transport module.
[    0.291616] PCI: CLS 0 bytes, default 64
[    0.292401] hw perfevents: enabled with armv7_cortex_a8 PMU driver, 5 counters available
[    0.293979] futex hash table entries: 256 (order: -1, 3072 bytes)
[    0.300433] squashfs: version 4.0 (2009/01/31) Phillip Lougher
[    0.301254] NFS: Registering the id_resolver key type
[    0.301317] Key type id_resolver registered
[    0.301324] Key type id_legacy registered
[    0.301392] ntfs: driver 2.1.32 [Flags: R/O].
[    0.304612] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 248)
[    0.304639] io scheduler noop registered
[    0.304649] io scheduler deadline registered
[    0.304776] io scheduler cfq registered (default)
[    0.305912] pinctrl-single 44e10800.pinmux: 142 pins at pa f9e10800 size 568
[    0.356062] Serial: 8250/16550 driver, 10 ports, IRQ sharing disabled
[    0.359505] 44e09000.serial: ttyS0 at MMIO 0x44e09000 (irq = 158, base_baud = 3000000) is a 8250
[    0.930548] console [ttyS0] enabled
[    0.934997] 48022000.serial: ttyS1 at MMIO 0x48022000 (irq = 159, base_baud = 3000000) is a 8250
[    0.944516] 48024000.serial: ttyS2 at MMIO 0x48024000 (irq = 160, base_baud = 3000000) is a 8250
[    0.953961] 481a8000.serial: ttyS4 at MMIO 0x481a8000 (irq = 161, base_baud = 3000000) is a 8250
[    0.963411] 481aa000.serial: ttyS5 at MMIO 0x481aa000 (irq = 162, base_baud = 3000000) is a 8250
[    0.972772] [drm] Initialized drm 1.1.0 20060810
[    0.983506] loop: module loaded
[    0.989904] libphy: Fixed MDIO Bus: probed
[    1.051512] davinci_mdio 4a101000.mdio: davinci mdio revision 1.6
[    1.057404] davinci_mdio 4a101000.mdio: detected phy mask fffffff9
[    1.064775] libphy: 4a101000.mdio: probed
[    1.068655] davinci_mdio 4a101000.mdio: phy[1]: device 4a101000.mdio:01, driver Broadcom BCM5461
[    1.077211] davinci_mdio 4a101000.mdio: phy[2]: device 4a101000.mdio:02, driver Broadcom BCM5461
[    1.086351] cpsw 4a100000.ethernet: Detected MACID = ec:24:b8:e0:d5:2f
[    1.093543] cpsw 4a100000.ethernet: cpsw: Detected MACID = ec:24:b8:e0:d5:31
[    1.101660] mousedev: PS/2 mouse device common for all mice
[    1.107553] i2c /dev entries driver
[    1.111901] cpuidle: enable-method property 'ti,am3352' found operations
[    1.118933] omap_hsmmc 48060000.mmc: GPIO lookup for consumer cd
[    1.118950] omap_hsmmc 48060000.mmc: using device tree for GPIO lookup
[    1.118963] of_get_named_gpiod_flags: can't parse 'cd-gpios' property of node '/ocp/mmc@48060000[0]'
[    1.118972] of_get_named_gpiod_flags: can't parse 'cd-gpio' property of node '/ocp/mmc@48060000[0]'
[    1.118979] omap_hsmmc 48060000.mmc: using lookup tables for GPIO lookup
[    1.118989] omap_hsmmc 48060000.mmc: lookup for GPIO cd failed
[    1.118999] omap_hsmmc 48060000.mmc: GPIO lookup for consumer wp
[    1.119006] omap_hsmmc 48060000.mmc: using device tree for GPIO lookup
[    1.119014] of_get_named_gpiod_flags: can't parse 'wp-gpios' property of node '/ocp/mmc@48060000[0]'
[    1.119021] of_get_named_gpiod_flags: can't parse 'wp-gpio' property of node '/ocp/mmc@48060000[0]'
[    1.119028] omap_hsmmc 48060000.mmc: using lookup tables for GPIO lookup
[    1.119036] omap_hsmmc 48060000.mmc: lookup for GPIO wp failed
[    1.151733] omap_hsmmc 481d8000.mmc: GPIO lookup for consumer cd
[    1.151752] omap_hsmmc 481d8000.mmc: using device tree for GPIO lookup
[    1.151763] of_get_named_gpiod_flags: can't parse 'cd-gpios' property of node '/ocp/mmc@481d8000[0]'
[    1.151771] of_get_named_gpiod_flags: can't parse 'cd-gpio' property of node '/ocp/mmc@481d8000[0]'
[    1.151778] omap_hsmmc 481d8000.mmc: using lookup tables for GPIO lookup
[    1.151786] omap_hsmmc 481d8000.mmc: lookup for GPIO cd failed
[    1.151796] omap_hsmmc 481d8000.mmc: GPIO lookup for consumer wp
[    1.151802] omap_hsmmc 481d8000.mmc: using device tree for GPIO lookup
[    1.151810] of_get_named_gpiod_flags: can't parse 'wp-gpios' property of node '/ocp/mmc@481d8000[0]'
[    1.151889] of_get_named_gpiod_flags: can't parse 'wp-gpio' property of node '/ocp/mmc@481d8000[0]'
[    1.151899] omap_hsmmc 481d8000.mmc: using lookup tables for GPIO lookup
[    1.151907] omap_hsmmc 481d8000.mmc: lookup for GPIO wp failed
[    1.191926] of_get_named_gpiod_flags: parsed 'gpios' property of node '/leds/led@2[0]' - status (0)
[    1.192133] of_get_named_gpiod_flags: parsed 'gpios' property of node '/leds/led@3[0]' - status (0)
[    1.192258] of_get_named_gpiod_flags: parsed 'gpios' property of node '/leds/led@4[0]' - status (0)
[    1.192268] gpio-79 (?): gpiod_request: status -16
[    1.192276] of_get_named_gpiod_flags: can't parse 'gpio' property of node '/leds/led@4[0]'
[    1.192442] leds-gpio: probe of leds failed with error -2
[    1.197907] ledtrig-cpu: registered to indicate activity on CPUs
[    1.206174] NET: Registered protocol family 10
[    1.211988] sit: IPv6 over IPv4 tunneling driver
[    1.217169] NET: Registered protocol family 17
[    1.221911] Key type dns_resolver registered
[    1.226070] mmc0: host does not support reading read-only switch, assuming write-enable
[    1.233985] omap_voltage_late_init: Voltage driver support not added
[    1.243519] mmc0: new high speed SDHC card at address 1388
[    1.250336] mmcblk0: mmc0:1388 USD00 14.7 GiB 
[    1.255983]  mmcblk0: p1 p2
[    1.268349] tps65217 0-0024: TPS65217 ID 0xe version 1.2
[    1.273821] at24 0-0050: 32768 byte 24c256 EEPROM, writable, 1 bytes/write
[    1.280549] omap_i2c 44e0b000.i2c: bus 0 rev0.11 at 400 kHz
[    1.290146] cpufreq: cpufreq_online: CPU0: Running at unlisted freq: 1041666 KHz
[    1.297386] cpu cpu0: dev_pm_opp_domain_set_rate: failed to find current OPP for freq 1041666666 (-34)
[    1.307937] cpufreq: cpufreq_online: CPU0: Unlisted initial frequency changed to: 600000 KHz
[    1.317193] hctosys: unable to open rtc device (rtc0)
[    1.326554] ALSA device list:
[    1.329579] mmc1: MAN_BKOPS_EN bit is not set
[    1.333869]   No soundcards found.
[    1.341389] mmc1: new high speed MMC card at address 0001
[    1.348494] mmcblk1: mmc1:0001 Q2J55L 7.09 GiB 
[    1.353974] mmcblk1boot0: mmc1:0001 Q2J55L partition 1 16.0 MiB
[    1.360174] mmcblk1boot1: mmc1:0001 Q2J55L partition 2 16.0 MiB
[    2.110411] EXT4-fs (mmcblk0p2): recovery complete
[    2.117322] EXT4-fs (mmcblk0p2): mounted filesystem with ordered data mode. Opts: (null)
[    2.125244] VFS: Mounted root (ext4 filesystem) on device 179:2.
[    2.138638] devtmpfs: mounted
[    2.142116] Freeing unused kernel memory: 268K (c08b5000 - c08f8000)
[    2.148246] This architecture does not have kernel memory protection.
[    2.389974] systemd[1]: System time before build time, advancing clock.
[    2.461989] random: systemd: uninitialized urandom read (16 bytes read, 38 bits of entropy available)
[    2.480303] random: systemd: uninitialized urandom read (16 bytes read, 38 bits of entropy available)
[    2.516813] systemd[1]: systemd 229 running in system mode. (+PAM -AUDIT -SELINUX +IMA -APPARMOR +SMACK +SYSVINIT +UTMP -LIBCRYPTSETUP -GCRYPT +GNUTLS +ACL +XZ -LZ4 -SECCOMP +BLKID -ELFUTILS +KMOD -IDN)
[    2.537088] systemd[1]: Detected architecture arm.
[    2.563080] systemd[1]: Set hostname to <am335x-evm>.
[    2.659043] random: systemd-gpt-aut: uninitialized urandom read (16 bytes read, 41 bits of entropy available)
[    2.673996] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 41 bits of entropy available)
[    2.700519] random: systemd-gpt-aut: uninitialized urandom read (16 bytes read, 42 bits of entropy available)
[    2.721433] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 43 bits of entropy available)
[    2.741004] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 43 bits of entropy available)
[    2.851283] random: systemd: uninitialized urandom read (16 bytes read, 48 bits of entropy available)
[    2.861168] random: systemd: uninitialized urandom read (16 bytes read, 48 bits of entropy available)
[    2.872366] random: systemd: uninitialized urandom read (16 bytes read, 48 bits of entropy available)
[    3.173881] systemd[1]: [/lib/systemd/system/gadget-init.service:15] Unknown lvalue 'ExecStopPre' in section 'Service'
[    3.478612] systemd[1]: sysinit.target: Found ordering cycle on sysinit.target/start
[    3.486320] systemd[1]: sysinit.target: Found dependency on alignment.service/start
[    3.493870] systemd[1]: sysinit.target: Found dependency on basic.target/start
[    3.500859] systemd[1]: sysinit.target: Found dependency on sockets.target/start
[    3.508051] systemd[1]: sysinit.target: Found dependency on dbus.socket/start
[    3.514974] systemd[1]: sysinit.target: Found dependency on sysinit.target/start
[    3.522149] systemd[1]: sysinit.target: Breaking ordering cycle by deleting job alignment.service/start
[    3.531232] systemd[1]: alignment.service: Job alignment.service/start deleted to break ordering cycle starting with sysinit.target/start
[    3.569259] systemd[1]: Listening on /dev/initctl Compatibility Named Pipe.
[    3.602206] systemd[1]: Listening on Syslog Socket.
[    3.631879] systemd[1]: Reached target Swap.
[    3.668627] systemd[1]: Listening on Journal Socket.
[    3.692506] systemd[1]: Listening on udev Control Socket.
[    3.722184] systemd[1]: Listening on udev Kernel Socket.
[    3.752565] systemd[1]: Started Dispatch Password Requests to Console Directory Watch.
[    3.782611] systemd[1]: Listening on Network Service Netlink Socket.
[    3.812168] systemd[1]: Listening on Journal Socket (/dev/log).
[    3.844790] systemd[1]: Created slice System Slice.
[    3.873729] systemd[1]: Created slice system-serial\x2dgetty.slice.
[    3.906995] systemd[1]: Mounting POSIX Message Queue File System...
[    3.947875] systemd[1]: Mounting Temporary Directory...
[    4.017231] systemd[1]: Starting Setup Virtual Console...
[    4.067338] systemd[1]: Starting Remount Root and Kernel File Systems...
[    4.123906] systemd[1]: Created slice system-getty.slice.
[    4.148431] EXT4-fs (mmcblk0p2): re-mounted. Opts: (null)
[    4.166205] systemd[1]: Starting Journal Service...
[    4.214900] systemd[1]: Created slice User and Session Slice.
[    4.242149] systemd[1]: Reached target Slices.
[    4.252538] systemd[1]: Started Forward Password Requests to Wall Directory Watch.
[    4.292133] systemd[1]: Reached target Paths.
[    4.302122] systemd[1]: Reached target Remote File Systems.
[    4.350506] systemd[1]: Starting Load Kernel Modules...
[    4.411039] cryptodev: driver 1.8 loaded.
[    4.428869] systemd[1]: Starting Create list of required static device nodes for the current kernel...
[    4.497122] systemd[1]: Mounting Debug File System...
[    4.575913] systemd[1]: Mounted POSIX Message Queue File System.
[    4.602227] systemd[1]: Mounted Debug File System.
[    4.612623] systemd[1]: Mounted Temporary Directory.
[    4.642723] systemd[1]: Started Journal Service.
[    6.612735] systemd-journald[93]: Received request to flush runtime journal from PID 1
[    8.568843] omap_wdt: OMAP Watchdog Timer Rev 0x01: initial timeout 60 sec
[    8.650998] rtc rtc0: 44e3e000.rtc: dev (254:0)
[    8.651059] omap_rtc 44e3e000.rtc: rtc core: registered 44e3e000.rtc as rtc0
[    8.725896] am335x-phy-driver 47401300.usb-phy: GPIO lookup for consumer reset
[    8.725936] am335x-phy-driver 47401300.usb-phy: using device tree for GPIO lookup
[    8.725958] of_get_named_gpiod_flags: can't parse 'reset-gpios' property of node '/ocp/usb@47400000/usb-phy@47401300[0]'
[    8.725973] of_get_named_gpiod_flags: can't parse 'reset-gpio' property of node '/ocp/usb@47400000/usb-phy@47401300[0]'
[    8.725987] am335x-phy-driver 47401300.usb-phy: using lookup tables for GPIO lookup
[    8.726002] am335x-phy-driver 47401300.usb-phy: lookup for GPIO reset failed
[    8.726018] am335x-phy-driver 47401300.usb-phy: GPIO lookup for consumer vbus-detect
[    8.726030] am335x-phy-driver 47401300.usb-phy: using device tree for GPIO lookup
[    8.726044] of_get_named_gpiod_flags: can't parse 'vbus-detect-gpios' property of node '/ocp/usb@47400000/usb-phy@47401300[0]'
[    8.726057] of_get_named_gpiod_flags: can't parse 'vbus-detect-gpio' property of node '/ocp/usb@47400000/usb-phy@47401300[0]'
[    8.726070] am335x-phy-driver 47401300.usb-phy: using lookup tables for GPIO lookup
[    8.726083] am335x-phy-driver 47401300.usb-phy: lookup for GPIO vbus-detect failed
[    8.726160] 47401300.usb-phy supply vcc not found, using dummy regulator
[    8.824560] am335x-phy-driver 47401b00.usb-phy: GPIO lookup for consumer reset
[    8.824601] am335x-phy-driver 47401b00.usb-phy: using device tree for GPIO lookup
[    8.824624] of_get_named_gpiod_flags: can't parse 'reset-gpios' property of node '/ocp/usb@47400000/usb-phy@47401b00[0]'
[    8.824639] of_get_named_gpiod_flags: can't parse 'reset-gpio' property of node '/ocp/usb@47400000/usb-phy@47401b00[0]'
[    8.824653] am335x-phy-driver 47401b00.usb-phy: using lookup tables for GPIO lookup
[    8.824668] am335x-phy-driver 47401b00.usb-phy: lookup for GPIO reset failed
[    8.824684] am335x-phy-driver 47401b00.usb-phy: GPIO lookup for consumer vbus-detect
[    8.824696] am335x-phy-driver 47401b00.usb-phy: using device tree for GPIO lookup
[    8.824710] of_get_named_gpiod_flags: can't parse 'vbus-detect-gpios' property of node '/ocp/usb@47400000/usb-phy@47401b00[0]'
[    8.824724] of_get_named_gpiod_flags: can't parse 'vbus-detect-gpio' property of node '/ocp/usb@47400000/usb-phy@47401b00[0]'
[    8.824736] am335x-phy-driver 47401b00.usb-phy: using lookup tables for GPIO lookup
[    8.824749] am335x-phy-driver 47401b00.usb-phy: lookup for GPIO vbus-detect failed
[    8.824825] 47401b00.usb-phy supply vcc not found, using dummy regulator
[    9.253552] omap_rng 48310000.rng: OMAP Random Number Generator ver. 20
[    9.938898] omap-sham 53100000.sham: hw accel on OMAP rev 4.3
[   10.203156]  remoteproc0: wkup_m3 is available
[   10.207473]  remoteproc0: Note: remoteproc is still under development and considered experimental.
[   10.352937]  remoteproc0: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed.
[   10.748670] omap_hwmod: pruss: _wait_target_ready failed: -16
[   10.832113] ti-pruss 4a300000.pruss: couldn't enable pruss
[   10.883980]  remoteproc0: powering up wkup_m3
[   10.899033] ti-pruss: probe of 4a300000.pruss failed with error -16
[   10.963003]  remoteproc0: Booting fw image am335x-pm-firmware.elf, size 217148
[   10.970267]  remoteproc0: remote processor wkup_m3 is now up
[   10.970299] wkup_m3_ipc 44e11324.wkup_m3_ipc: CM3 Firmware Version = 0x191
[   11.011985] omap-aes 53500000.aes: OMAP AES hw accel rev: 3.2
[   11.452197] PM: bootloader does not support rtc-only!
[   13.053239] FAT-fs (mmcblk0p1): Volume was not properly unmounted. Some data may be corrupt. Please run fsck.
[   14.041570] random: nonblocking pool is initialized
[   15.689764] usbcore: registered new interface driver usbfs
[   15.771046] usbcore: registered new interface driver hub
[   15.817739] usbcore: registered new device driver usb
[   15.929500] musb-hdrc: ConfigData=0xde (UTMI-8, dyn FIFOs, bulk combine, bulk split, HB-ISO Rx, HB-ISO Tx, SoftConn)
[   15.929535] musb-hdrc: MHDRC RTL version 2.0 
[   15.929548] musb-hdrc: setup fifo_mode 4
[   15.929574] musb-hdrc: 28/31 max ep, 16384/16384 memory
[   15.929771] musb-hdrc musb-hdrc.0.auto: MUSB HDRC host driver
[   15.980271] musb-hdrc musb-hdrc.0.auto: new USB bus registered, assigned bus number 1
[   16.032120] hub 1-0:1.0: USB hub found
[   16.052816] hub 1-0:1.0: 1 port detected
[   16.090162] musb-hdrc: ConfigData=0xde (UTMI-8, dyn FIFOs, bulk combine, bulk split, HB-ISO Rx, HB-ISO Tx, SoftConn)
[   16.090197] musb-hdrc: MHDRC RTL version 2.0 
[   16.090211] musb-hdrc: setup fifo_mode 4
[   16.090233] musb-hdrc: 28/31 max ep, 16384/16384 memory
[   16.090411] musb-hdrc musb-hdrc.1.auto: MUSB HDRC host driver
[   16.111780] musb-hdrc musb-hdrc.1.auto: new USB bus registered, assigned bus number 2
[   16.135052] hub 2-0:1.0: USB hub found
[   16.143560] hub 2-0:1.0: 1 port detected
[   16.300041] musb-hdrc musb-hdrc.1.auto: VBUS_ERROR in a_wait_vrise (81, <SessEnd), retry #1, port1 00000104
[   16.446363] musb-hdrc musb-hdrc.1.auto: VBUS_ERROR in a_wait_vrise (81, <SessEnd), retry #2, port1 00000104
[   16.461702] usb 1-1: new high-speed USB device number 2 using musb-hdrc
[   16.592699] musb-hdrc musb-hdrc.1.auto: VBUS_ERROR in a_wait_vrise (81, <SessEnd), retry #3, port1 00000104
[   16.603100] usb 1-1: device descriptor read/64, error -71
[   16.739033] musb-hdrc musb-hdrc.1.auto: VBUS_ERROR in a_wait_vrise (80, <SessEnd), retry #3, port1 0008010c
[   16.831659] usb 1-1: device descriptor read/64, error -71
[   17.061656] usb 1-1: new high-speed USB device number 3 using musb-hdrc
[   17.201698] usb 1-1: device descriptor read/64, error -71
[   17.439922] usb 1-1: device descriptor read/64, error -71
[   17.691793] usb 1-1: new high-speed USB device number 4 using musb-hdrc
[   17.732017] usb 1-1: device descriptor read/all, error -71
[   17.861690] usb 1-1: new high-speed USB device number 5 using musb-hdrc
[   17.894186] usb 1-1: device descriptor read/8, error -71
[   17.912002] NET: Registered protocol family 15
[   18.021882] usb 1-1: device descriptor read/8, error -71
[   18.131756] usb usb1-port1: unable to enumerate USB device
[   18.868470] Bluetooth: Core ver 2.21
[   18.907702] net eth1: initializing cpsw version 1.12 (0)
[   18.920205] NET: Registered protocol family 31
[   18.988948] net eth0: initialized cpsw ale version 1.4
[   18.994850] Bluetooth: HCI device and connection manager initialized
[   19.044320] net eth0: ALE Table size 1024
[   19.050858] MDIO Write 1 0 8000 
[   19.068018] Bluetooth: HCI socket layer initialized
[   19.122477] Bluetooth: L2CAP socket layer initialized
[   19.180280] Bluetooth: SCO socket layer initialized
[   19.203453] Initializing XFRM netlink socket
[   19.232580] MDIO Write 1 10 1000 
[   19.235935] MDIO Write 1 1b fff1 
[   19.239244] MDIO Write 1 18 c00 
[   19.310651] MDIO Write 1 18 400 
[   19.351854] Manual MDIO Write 1 18 f387 
[   19.380083] Manual MDIO Write 1 1c 8e00 
[   19.407490] net eth1: phy found : id is : 0x2060c1
[   19.471097] IPv6: ADDRCONF(NETDEV_UP): eth1: link is not ready
[   19.630772] net eth0: initializing cpsw version 1.12 (0)
[   19.690684] MDIO Write 2 0 8000 
[   19.821759] MDIO Write 2 10 1000 
[   19.825250] MDIO Write 2 1b fff1 
[   19.828554] MDIO Write 2 18 c00 
[   19.904559] MDIO Write 2 18 400 
[   19.945378] Manual MDIO Write 2 18 f387 
[   19.969782] Manual MDIO Write 2 1c 8e00 
[   20.010279] net eth0: phy found : id is : 0x2060c1
[   20.089270] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready
[   20.401916] MDIO Write 1 4 de1 
[   20.405341] MDIO Write 1 9 300 
[   20.408584] MDIO Write 1 0 1340 
[   21.001837] MDIO Write 2 4 de1 
[   21.005260] MDIO Write 2 9 300 
[   21.039149] MDIO Write 2 0 3300 
[   24.062696] cpsw 4a100000.ethernet eth0: Link is Up - 1Gbps/Full - flow control rx/tx
[   24.070329] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready

/*
 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

/ {
	cpus {
		cpu@0 {
			cpu0-supply = <&dcdc2_reg>;
		};
	};

	memory {
		device_type = "memory";
		reg = <0x80000000 0x10000000>; /* 256 MB */
	};

	leds {
		pinctrl-names = "default", "sleep";
		pinctrl-0 = <&user_leds_default>;
		pinctrl-1 = <&user_leds_sleep>;

		compatible = "gpio-leds";

		led@2 {
			label = "beaglebone:green:heartbeat";
			gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "heartbeat";
			default-state = "off";
		};

		led@3 {
			label = "ETH1_PHY_RESET";
			gpios = <&gpio2 15 GPIO_ACTIVE_LOW>;
			default-state = "off";
		};

		led@4 {
			label = "ETH0_PHY_RESET";
			gpios = <&gpio2 15 GPIO_ACTIVE_LOW>;
			default-state = "off";
		};
	};

	vmmcsd_fixed: fixedregulator@0 {
		compatible = "regulator-fixed";
		regulator-name = "vmmcsd_fixed";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
	};
};

&am33xx_pinmux {
	pinctrl-names = "default";
	pinctrl-0 = <&clkout2_pin>;

	user_leds_default: user_leds_default {
		pinctrl-single,pins = <
			0x19c (PIN_OUTPUT_PULLDOWN | MUX_MODE7)	/* (A14) mcasp0_ahclkx.gpio3_21 */
			0xc4 ( PIN_OUTPUT_PULLUP | MUX_MODE7 )	/* (U2) lcd_data9.gpio2[15] / ETH1_PHY_RESET */
			0xc8 ( PIN_OUTPUT_PULLUP | MUX_MODE7 )	/* (U3) lcd_data10.gpio2[16] / ETH0_PHY_RESET */
		>;
	};

	user_leds_sleep: user_leds_sleep {
		pinctrl-single,pins = <
			0x19c (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0xc4 ( PIN_OUTPUT_PULLUP | MUX_MODE7 )
			0xc8 ( PIN_OUTPUT_PULLUP | MUX_MODE7 )
		>;
	};
	
	uart0_pins: pinmux_uart0_pins {
		pinctrl-single,pins = <
			0x170 (PIN_INPUT_PULLUP | MUX_MODE0)	/* (E15) uart0_rxd.uart0_rxd */
			0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* (E16) uart0_txd.uart0_txd */
		>;
	};

	uart1_pins: pinmux_uart1_pins {
		pinctrl-single,pins = <
			0x180 ( PIN_INPUT_PULLUP | MUX_MODE0 )		/* (D16) uart1_rxd.uart1_rxd */
			0x184 ( PIN_OUTPUT_PULLDOWN | MUX_MODE0 )	/* (D15) uart1_txd.uart1_txd */
			0x178 ( PIN_INPUT_PULLUP | MUX_MODE0 )		/* (D18) uart1_ctsn.uart1_ctsn */
			0x17c ( PIN_OUTPUT_PULLDOWN | MUX_MODE0 )	/* (D17) uart1_rtsn.uart1_rtsn */
		>;
	};
	
	uart2_pins: pinmux_uart2_pins {
		pinctrl-single,pins = <
			0x10c ( PIN_INPUT_PULLUP | MUX_MODE6 )		/* (H17) gmii1_crs.uart2_rxd */
			0x110 ( PIN_OUTPUT_PULLDOWN | MUX_MODE6 )	/* (J15) gmii1_rxer.uart2_txd */
		>;
	};
	
	uart4_pins: pinmux_uart4_pins {
		pinctrl-single,pins = <
			0x70 ( PIN_INPUT_PULLUP | MUX_MODE6 )		/* (T17) gpmc_wait0.uart4_rxd */
			0x74 ( PIN_OUTPUT_PULLDOWN | MUX_MODE6 )	/* (U17) gpmc_wpn.uart4_txd */
			0xd0 ( PIN_INPUT_PULLUP | MUX_MODE6 )		/* (V2) lcd_data12.uart4_ctsn */
			0xd4 ( PIN_OUTPUT_PULLDOWN | MUX_MODE6 )	/* (V3) lcd_data13.uart4_rtsn */
		>;
	};
	
	uart5_pins: pinmux_uart5_pins {
		pinctrl-single,pins = <
			0x108 ( PIN_INPUT_PULLUP | MUX_MODE3 )		/* (H16) gmii1_col.uart5_rxd */
			0x144 ( PIN_OUTPUT_PULLDOWN | MUX_MODE3 )	/* (H18) rmii1_refclk.uart5_txd */
			0xd8 ( PIN_INPUT_PULLUP | MUX_MODE6 )		/* (V4) lcd_data14.uart5_ctsn */
			0xdc ( PIN_OUTPUT_PULLDOWN | MUX_MODE6 )	/* (T5) lcd_data15.uart5_rtsn */
		>;
	};
	
	i2c0_pins: pinmux_i2c0_pins {
		pinctrl-single,pins = <
			0x188 (PIN_INPUT_PULLUP | MUX_MODE0)	/* (C17) i2c0_sda.i2c0_sda */
			0x18c (PIN_INPUT_PULLUP | MUX_MODE0)	/* (C16) i2c0_scl.i2c0_scl */
		>;
	};
	
	spi0_pins: pinmux_spi0_pins {
		pinctrl-single,pins = <
			0x150 ( PIN_INPUT | MUX_MODE0 )			/* (A17) spi0_sclk.spi0_sclk */
			0x154 ( PIN_OUTPUT_PULLUP | MUX_MODE0 )	/* (B17) spi0_d0.spi0_d0 */
			0x158 ( PIN_INPUT | MUX_MODE0 )			/* (B16) spi0_d1.spi0_d1 */
			0x15c ( PIN_OUTPUT | MUX_MODE0 )		/* (A16) spi0_cs0.spi0_cs0 */
			0x160 ( PIN_OUTPUT | MUX_MODE0 )		/* (C15) spi0_cs1.spi0_cs1 */
		>;
	};
	
	spi1_pins: pinmux_spi1_pins {
		pinctrl-single,pins = <
			0x190 ( PIN_INPUT | MUX_MODE3 )			/* (A13) mcasp0_aclkx.spi1_sclk */
			0x194 ( PIN_OUTPUT_PULLUP | MUX_MODE3 )	/* (B13) mcasp0_fsx.spi1_d0 */
			0x198 ( PIN_INPUT | MUX_MODE3 )			/* (D12) mcasp0_axr0.spi1_d1 */
			0x16c ( PIN_OUTPUT | MUX_MODE5 )		/* (E17) uart0_rtsn.spi1_cs0 */
			0x1b0 ( PIN_OUTPUT | MUX_MODE4 )		/* (A15) xdma_event_intr0.spi1_cs1 */
		>;
	};
	
	mmc1_pins: pinmux_mmc1_pins {
		pinctrl-single,pins = <
			/* mmc0_dat3.mmc0_dat3 */
			AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0)
			/* mmc0_dat2.mmc0_dat2 */
			AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0)
			/* mmc0_dat1.mmc0_dat1 */
			AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0)
			/* mmc0_dat0.mmc0_dat0 */
			AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0)
			/* mmc0_clk.mmc0_clk */
			AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0)
			/* mmc0_cmd.mmc0_cmd */
			AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0)
		>;
	};
	
	emmc_pins: pinmux_emmc_pins {
		pinctrl-single,pins = <
			0x80 (PIN_INPUT_PULLUP | MUX_MODE2)	/* (U9) gpmc_csn1.mmc1_clk */
			0x84 (PIN_INPUT_PULLUP | MUX_MODE2)	/* (V9) gpmc_csn2.mmc1_cmd */
			0x00 (PIN_INPUT_PULLUP | MUX_MODE1)	/* (U7) gpmc_ad0.mmc1_dat0 */
			0x04 (PIN_INPUT_PULLUP | MUX_MODE1)	/* (V7) gpmc_ad1.mmc1_dat1 */
			0x08 (PIN_INPUT_PULLUP | MUX_MODE1)	/* (R8) gpmc_ad2.mmc1_dat2 */
			0x0c (PIN_INPUT_PULLUP | MUX_MODE1)	/* (T8) gpmc_ad3.mmc1_dat3 */
			0x10 (PIN_INPUT_PULLUP | MUX_MODE1)	/* (U8) gpmc_ad4.mmc1_dat4 */
			0x14 (PIN_INPUT_PULLUP | MUX_MODE1)	/* (V8) gpmc_ad5.mmc1_dat5 */
			0x18 (PIN_INPUT_PULLUP | MUX_MODE1)	/* (R9) gpmc_ad6.mmc1_dat6 */
			0x1c (PIN_INPUT_PULLUP | MUX_MODE1)	/* (T9) gpmc_ad7.mmc1_dat7 */
		>;
	};
	
	cpsw_default: cpsw_default {
		pinctrl-single,pins = <
			/* Slave 1 */
			AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txen.rgmii1_tctl */
			AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE2)		/* mii1_rxdv.rgmii1_rctl */
			AM33XX_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd3.rgmii1_td3 */
			AM33XX_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd2.rgmii1_td2 */
			AM33XX_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd1.rgmii1_td1 */
			AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd0.rgmii1_td0 */
			AM33XX_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txclk.rgmii1_tclk */
			AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE2)		/* mii1_rxclk.rgmii1_rclk */
			AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE2)		/* mii1_rxd3.rgmii1_rd3 */
			AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE2)		/* mii1_rxd2.rgmii1_rd2 */
			AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE2)		/* mii1_rxd1.rgmii1_rd1 */
			AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE2)		/* mii1_rxd0.rgmii1_rd0 */

			/* Slave 2 */
			AM33XX_IOPAD(0x840, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a0.rgmii2_tctl */
			AM33XX_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE2)		/* gpmc_a1.rgmii2_rctl */
			AM33XX_IOPAD(0x848, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a2.rgmii2_td3 */
			AM33XX_IOPAD(0x84c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a3.rgmii2_td2 */
			AM33XX_IOPAD(0x850, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a4.rgmii2_td1 */
			AM33XX_IOPAD(0x854, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a5.rgmii2_td0 */
			AM33XX_IOPAD(0x858, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a6.rgmii2_tclk */
			AM33XX_IOPAD(0x85c, PIN_INPUT_PULLDOWN | MUX_MODE2)		/* gpmc_a7.rgmii2_rclk */
			AM33XX_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE2)		/* gpmc_a8.rgmii2_rd3 */
			AM33XX_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE2)		/* gpmc_a9.rgmii2_rd2 */
			AM33XX_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE2)		/* gpmc_a10.rgmii2_rd1 */
			AM33XX_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE2)		/* gpmc_a11.rgmii2_rd0 */
		>;
	};

	cpsw_sleep: cpsw_sleep {
		pinctrl-single,pins = <
			/* Slave 1 reset value */
			AM33XX_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)

			/* Slave 2 reset value*/
			AM33XX_IOPAD(0x840, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x848, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x84c, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x850, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x854, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x858, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x85c, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE7)
		>;
	};
	
	davinci_mdio_default: davinci_mdio_default {
		pinctrl-single,pins = <
			/* MDIO */
			AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)	/* mdio_data.mdio_data */
			AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0)					/* mdio_clk.mdio_clk */
		>;
	};

	davinci_mdio_sleep: davinci_mdio_sleep {
		pinctrl-single,pins = <
			/* MDIO reset value */
			AM33XX_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
		>;
	};
	
	ehrpwm0_pins: pinmux_ehrpwm0_pins {
		pinctrl-single,pins = <
			0xc8 ( PIN_OUTPUT_PULLDOWN | MUX_MODE2 ) /* (U3) lcd_data10.ehrpwm1A */
			0xcc ( PIN_OUTPUT_PULLDOWN | MUX_MODE2 ) /* (U4) lcd_data11.ehrpwm1B */
		>;
	};

		clkout2_pin: pinmux_clkout2_pin {
			pinctrl-single,pins = <
				0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3)	/* xdma_event_intr1.clkout2 */
			>;
		};
};

&uart0 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart0_pins>;

	status = "okay";
};

&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart1_pins>;

	status = "okay";
};

&uart2 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart2_pins>;

	status = "okay";
};

&uart4 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart4_pins>;

	status = "okay";
};

&uart5 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart5_pins>;

	status = "okay";
};

&usb {
	status = "okay";
};

&usb_ctrl_mod {
	status = "okay";
};

&usb0_phy {
	status = "okay";
};

&usb1_phy {
	status = "okay";
};

&usb0 {
	status = "okay";
	dr_mode = "host";
};

&usb1 {
	status = "okay";
	dr_mode = "host";
};

&cppi41dma  {
	status = "okay";
};

&i2c0 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c0_pins>;

	status = "okay";
	clock-frequency = <400000>;

	tps: tps@24 {
		reg = <0x24>;
	};

	baseboard_eeprom: baseboard_eeprom@50 {
		compatible = "at,24c256";
		reg = <0x50>;

		#address-cells = <1>;
		#size-cells = <1>;
		baseboard_data: baseboard_data@0 {
			reg = <0 0x100>;
		};
	};
};

&spi0 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&spi0_pins>;
	ti,pindir-d0-out-d1-in = <1>;
};

&spi1 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&spi1_pins>;
	ti,pindir-d0-out-d1-in = <1>;
};

/include/ "tps65217.dtsi"

&tps {
	/*
	 * Configure pmic to enter OFF-state instead of SLEEP-state ("RTC-only
	 * mode") at poweroff.  Most BeagleBone versions do not support RTC-only
	 * mode and risk hardware damage if this mode is entered.
	 *
	 * For details, see linux-omap mailing list May 2015 thread
	 *	[PATCH] ARM: dts: am335x-bone* enable pmic-shutdown-controller
	 * In particular, messages:
	 *	http://www.spinics.net/lists/linux-omap/msg118585.html
	 *	http://www.spinics.net/lists/linux-omap/msg118615.html
	 *
	 * You can override this later with
	 *	&tps {  /delete-property/ ti,pmic-shutdown-controller;  }
	 * if you want to use RTC-only mode and made sure you are not affected
	 * by the hardware problems. (Tip: double-check by performing a current
	 * measurement after shutdown: it should be less than 1 mA.)
	 */
	ti,pmic-shutdown-controller;

	regulators {
		dcdc1_reg: regulator@0 {
			regulator-name = "vdds_dpr";
			regulator-always-on;
		};

		dcdc2_reg: regulator@1 {
			/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
			regulator-name = "vdd_mpu";
			regulator-min-microvolt = <925000>;
			regulator-max-microvolt = <1351500>;
			regulator-boot-on;
			regulator-always-on;
		};

		dcdc3_reg: regulator@2 {
			/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
			regulator-name = "vdd_core";
			regulator-min-microvolt = <925000>;
			regulator-max-microvolt = <1150000>;
			regulator-boot-on;
			regulator-always-on;
		};

		ldo1_reg: regulator@3 {
			regulator-name = "vio,vrtc,vdds";
			regulator-always-on;
		};

		ldo2_reg: regulator@4 {
			regulator-name = "vdd_3v3aux";
			regulator-always-on;
		};

		ldo3_reg: regulator@5 {
			regulator-name = "vdd_1v8";
			regulator-always-on;
		};

		ldo4_reg: regulator@6 {
			regulator-name = "vdd_3v3a";
			regulator-always-on;
		};
	};
};

&mac {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&cpsw_default>;
	pinctrl-1 = <&cpsw_sleep>;
	dual_emac = <1>;
	status = "okay";
};

&davinci_mdio {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&davinci_mdio_default>;
	pinctrl-1 = <&davinci_mdio_sleep>;
	status = "okay";
};

&cpsw_emac0 {
	phy_id = <&davinci_mdio>, <2>;
	phy-mode = "rgmii-txid";
	dual_emac_res_vlan = <1>;
};

&cpsw_emac1 {
	phy_id = <&davinci_mdio>, <1>;
	phy-mode = "rgmii-txid";
	dual_emac_res_vlan = <2>;
};

&mmc1 {
	status = "okay";
	bus-width = <0x4>;
	pinctrl-names = "default";
	pinctrl-0 = <&mmc1_pins>;
	/*cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;*/
};

&aes {
	status = "okay";
};

&sham {
	status = "okay";
};

&wkup_m3_ipc {
	ti,scale-data-fw = "am335x-bone-scale-data.bin";
};

&rtc {
	clocks = <&clk_32768_ck>, <&clkdiv32k_ick>;
	clock-names = "ext-clk", "int-clk";
	system-power-controller;
};

&tscadc {
	status = "okay";

	adc {
		ti,adc-channels = <0 1 2 3 4 5 6 7>;
	};
};

&ehrpwm0 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&ehrpwm0_pins>;
};

/*
 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
/dts-v1/;

#include "am33xx.dtsi"
#include "am335x-bone-common.dtsi"

/ {
	model = "TI AM335x BeagleBone Black";
	compatible = "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx";
};

&ldo3_reg {
	regulator-min-microvolt = <1800000>;
	regulator-max-microvolt = <1800000>;
	regulator-always-on;
};

&mmc1 {
	vmmc-supply = <&vmmcsd_fixed>;
};

&mmc2 {
	vmmc-supply = <&vmmcsd_fixed>;
	pinctrl-names = "default";
	pinctrl-0 = <&emmc_pins>;
	bus-width = <8>;
	status = "okay";
};

&cpu0_opp_table {
	/*
	 * All PG 2.0 silicon may not support 1GHz but some of the early
	 * BeagleBone Blacks have PG 2.0 silicon which is guaranteed
	 * to support 1GHz OPP so enable it for PG 2.0 on this board.
	 */
	oppnitro@1000000000 {
		opp-supported-hw = <0x06 0x0100>;
	};
};

&rtc {
	system-power-controller;
};

/*
 * Device Tree Source for AM33XX SoC
 *
 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
 *
 * This file is licensed under the terms of the GNU General Public License
 * version 2.  This program is licensed "as is" without any warranty of any
 * kind, whether express or implied.
 */

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/am33xx.h>

#include "skeleton.dtsi"

/ {
	compatible = "ti,am33xx";
	interrupt-parent = <&intc>;

	aliases {
		i2c0 = &i2c0;
		i2c1 = &i2c1;
		i2c2 = &i2c2;
		serial0 = &uart0;
		serial1 = &uart1;
		serial2 = &uart2;
		serial3 = &uart3;
		serial4 = &uart4;
		serial5 = &uart5;
		d_can0 = &dcan0;
		d_can1 = &dcan1;
		usb0 = &usb0;
		usb1 = &usb1;
		phy0 = &usb0_phy;
		phy1 = &usb1_phy;
		ethernet0 = &cpsw_emac0;
		ethernet1 = &cpsw_emac1;
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;
		cpu@0 {
			compatible = "arm,cortex-a8";
			enable-method = "ti,am3352";
			device_type = "cpu";
			reg = <0>;

			operating-points-v2 = <&cpu0_opp_table>;
			ti,syscon-efuse = <&scm_conf 0x7fc 0x1fff 0>;
			ti,syscon-rev = <&scm_conf 0x600>;

			clocks = <&dpll_mpu_ck>;
			clock-names = "cpu";

			clock-latency = <300000>; /* From omap-cpufreq driver */
			cpu-idle-states = <&mpu_gate>;
		};

		idle-states {
			mpu_gate: mpu_gate {
				compatible = "arm,idle-state";
				entry-latency-us = <40>;
				exit-latency-us = <90>;
				min-residency-us = <300>;
				ti,idle-wkup-m3;
			};
		};
	};

	cpu0_opp_table: opp_table0 {
		compatible = "operating-points-v2";

		/*
		 * The three following nodes are marked with opp-suspend
		 * because the can not be enabled simultaneously on a
		 * single SoC.
		 */
		opp50@300000000 {
			opp-hz = /bits/ 64 <300000000>;
			opp-microvolt = <950000 931000 969000>;
			opp-supported-hw = <0x06 0x0010>;
			opp-suspend;
		};

		opp100@275000000 {
			opp-hz = /bits/ 64 <275000000>;
			opp-microvolt = <1100000 1078000 1122000>;
			opp-supported-hw = <0x01 0x00FF>;
			opp-suspend;
		};

		opp100@300000000 {
			opp-hz = /bits/ 64 <300000000>;
			opp-microvolt = <1100000 1078000 1122000>;
			opp-supported-hw = <0x06 0x0020>;
			opp-suspend;
		};

		opp100@500000000 {
			opp-hz = /bits/ 64 <500000000>;
			opp-microvolt = <1100000 1078000 1122000>;
			opp-supported-hw = <0x01 0xFFFF>;
		};

		opp100@600000000 {
			opp-hz = /bits/ 64 <600000000>;
			opp-microvolt = <1100000 1078000 1122000>;
			opp-supported-hw = <0x06 0x0040>;
		};

		opp120@600000000 {
			opp-hz = /bits/ 64 <600000000>;
			opp-microvolt = <1200000 1176000 1224000>;
			opp-supported-hw = <0x01 0xFFFF>;
		};

		opp120@720000000 {
			opp-hz = /bits/ 64 <720000000>;
			opp-microvolt = <1200000 1176000 1224000>;
			opp-supported-hw = <0x06 0x0080>;
		};

		oppturbo@720000000 {
			opp-hz = /bits/ 64 <720000000>;
			opp-microvolt = <1260000 1234800 1285200>;
			opp-supported-hw = <0x01 0xFFFF>;
		};

		oppturbo@800000000 {
			opp-hz = /bits/ 64 <800000000>;
			opp-microvolt = <1260000 1234800 1285200>;
			opp-supported-hw = <0x06 0x0100>;
		};

		oppnitro@1000000000 {
			opp-hz = /bits/ 64 <1000000000>;
			opp-microvolt = <1325000 1298500 1351500>;
			opp-supported-hw = <0x04 0x0200>;
		};
	};

	pmu {
		compatible = "arm,cortex-a8-pmu";
		interrupts = <3>;
	};

	/*
	 * The soc node represents the soc top level view. It is used for IPs
	 * that are not memory mapped in the MPU view or for the MPU itself.
	 */
	soc {
		compatible = "ti,omap-infra";
		mpu {
			compatible = "ti,omap3-mpu";
			ti,hwmods = "mpu";
			sram = <&ocmcram>;
		};
	};

	/*
	 * XXX: Use a flat representation of the AM33XX interconnect.
	 * The real AM33XX interconnect network is quite complex. Since
	 * it will not bring real advantage to represent that in DT
	 * for the moment, just use a fake OCP bus entry to represent
	 * the whole bus hierarchy.
	 */
	ocp {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;
		ti,hwmods = "l3_main";

		l4_wkup: l4_wkup@44c00000 {
			compatible = "ti,am3-l4-wkup", "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0 0x44c00000 0x280000>;

			wkup_m3: wkup_m3@100000 {
				compatible = "ti,am3352-wkup-m3";
				reg = <0x100000 0x4000>,
				      <0x180000	0x2000>;
				reg-names = "umem", "dmem";
				ti,hwmods = "wkup_m3";
				ti,pm-firmware = "am335x-pm-firmware.elf";
			};

			prcm: prcm@200000 {
				compatible = "ti,am3-prcm";
				reg = <0x200000 0x4000>;

				prcm_clocks: clocks {
					#address-cells = <1>;
					#size-cells = <0>;
				};

				prcm_clockdomains: clockdomains {
				};
			};

			scm: scm@210000 {
				compatible = "ti,am3-scm", "simple-bus";
				reg = <0x210000 0x2000>;
				#address-cells = <1>;
				#size-cells = <1>;
				ranges = <0 0x210000 0x2000>;

				am33xx_pinmux: pinmux@800 {
					compatible = "pinctrl-single";
					reg = <0x800 0x238>;
					#address-cells = <1>;
					#size-cells = <0>;
					pinctrl-single,register-width = <32>;
					pinctrl-single,function-mask = <0x7f>;
				};

				scm_conf: scm_conf@0 {
					compatible = "syscon";
					reg = <0x0 0x800>;
					#address-cells = <1>;
					#size-cells = <1>;

					scm_clocks: clocks {
						#address-cells = <1>;
						#size-cells = <0>;
					};
				};

				wkup_m3_ipc: wkup_m3_ipc@1324 {
					compatible = "ti,am3352-wkup-m3-ipc";
					reg = <0x1324 0x24>;
					interrupts = <78>;
					ti,rproc = <&wkup_m3>;
					mboxes = <&mailbox &mbox_wkupm3>;
				};

				edma_xbar: dma-router@f90 {
					compatible = "ti,am335x-edma-crossbar";
					reg = <0xf90 0x40>;
					#dma-cells = <3>;
					dma-requests = <32>;
					dma-masters = <&edma>;
				};

				scm_clockdomains: clockdomains {
				};
			};
		};

		intc: interrupt-controller@48200000 {
			compatible = "ti,am33xx-intc";
			interrupt-controller;
			#interrupt-cells = <1>;
			reg = <0x48200000 0x1000>;
		};

		edma: edma@49000000 {
			compatible = "ti,edma3-tpcc";
			ti,hwmods = "tpcc";
			reg =	<0x49000000 0x10000>;
			reg-names = "edma3_cc";
			interrupts = <12 13 14>;
			interrupt-names = "edma3_ccint", "emda3_mperr",
					  "edma3_ccerrint";
			dma-requests = <64>;
			#dma-cells = <2>;

			ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>,
				   <&edma_tptc2 0>;

			ti,edma-memcpy-channels = <20 21>;
		};

		edma_tptc0: tptc@49800000 {
			compatible = "ti,edma3-tptc";
			ti,hwmods = "tptc0";
			reg =	<0x49800000 0x100000>;
			interrupts = <112>;
			interrupt-names = "edma3_tcerrint";
		};

		edma_tptc1: tptc@49900000 {
			compatible = "ti,edma3-tptc";
			ti,hwmods = "tptc1";
			reg =	<0x49900000 0x100000>;
			interrupts = <113>;
			interrupt-names = "edma3_tcerrint";
		};

		edma_tptc2: tptc@49a00000 {
			compatible = "ti,edma3-tptc";
			ti,hwmods = "tptc2";
			reg =	<0x49a00000 0x100000>;
			interrupts = <114>;
			interrupt-names = "edma3_tcerrint";
		};

		emif: emif@4c000000 {
			compatible = "ti,emif-am3352";
			reg =	<0x4C000000 0x1000>;
			sram = <&ocmcram>;
		};

		gpio0: gpio@44e07000 {
			compatible = "ti,omap4-gpio";
			ti,hwmods = "gpio1";
			gpio-controller;
			#gpio-cells = <2>;
			interrupt-controller;
			#interrupt-cells = <2>;
			reg = <0x44e07000 0x1000>;
			interrupts = <96>;
		};

		gpio1: gpio@4804c000 {
			compatible = "ti,omap4-gpio";
			ti,hwmods = "gpio2";
			gpio-controller;
			#gpio-cells = <2>;
			interrupt-controller;
			#interrupt-cells = <2>;
			reg = <0x4804c000 0x1000>;
			interrupts = <98>;
		};

		gpio2: gpio@481ac000 {
			compatible = "ti,omap4-gpio";
			ti,hwmods = "gpio3";
			gpio-controller;
			#gpio-cells = <2>;
			interrupt-controller;
			#interrupt-cells = <2>;
			reg = <0x481ac000 0x1000>;
			interrupts = <32>;
		};

		gpio3: gpio@481ae000 {
			compatible = "ti,omap4-gpio";
			ti,hwmods = "gpio4";
			gpio-controller;
			#gpio-cells = <2>;
			interrupt-controller;
			#interrupt-cells = <2>;
			reg = <0x481ae000 0x1000>;
			interrupts = <62>;
		};

		uart0: serial@44e09000 {
			compatible = "ti,am3352-uart", "ti,omap3-uart";
			ti,hwmods = "uart1";
			clock-frequency = <48000000>;
			reg = <0x44e09000 0x2000>;
			interrupts = <72>;
			status = "disabled";
			dmas = <&edma 26 0>, <&edma 27 0>;
			dma-names = "tx", "rx";
		};

		uart1: serial@48022000 {
			compatible = "ti,am3352-uart", "ti,omap3-uart";
			ti,hwmods = "uart2";
			clock-frequency = <48000000>;
			reg = <0x48022000 0x2000>;
			interrupts = <73>;
			status = "disabled";
			dmas = <&edma 28 0>, <&edma 29 0>;
			dma-names = "tx", "rx";
		};

		uart2: serial@48024000 {
			compatible = "ti,am3352-uart", "ti,omap3-uart";
			ti,hwmods = "uart3";
			clock-frequency = <48000000>;
			reg = <0x48024000 0x2000>;
			interrupts = <74>;
			status = "disabled";
			dmas = <&edma 30 0>, <&edma 31 0>;
			dma-names = "tx", "rx";
		};

		uart3: serial@481a6000 {
			compatible = "ti,am3352-uart", "ti,omap3-uart";
			ti,hwmods = "uart4";
			clock-frequency = <48000000>;
			reg = <0x481a6000 0x2000>;
			interrupts = <44>;
			status = "disabled";
		};

		uart4: serial@481a8000 {
			compatible = "ti,am3352-uart", "ti,omap3-uart";
			ti,hwmods = "uart5";
			clock-frequency = <48000000>;
			reg = <0x481a8000 0x2000>;
			interrupts = <45>;
			status = "disabled";
		};

		uart5: serial@481aa000 {
			compatible = "ti,am3352-uart", "ti,omap3-uart";
			ti,hwmods = "uart6";
			clock-frequency = <48000000>;
			reg = <0x481aa000 0x2000>;
			interrupts = <46>;
			status = "disabled";
		};

		i2c0: i2c@44e0b000 {
			compatible = "ti,omap4-i2c";
			#address-cells = <1>;
			#size-cells = <0>;
			ti,hwmods = "i2c1";
			reg = <0x44e0b000 0x1000>;
			interrupts = <70>;
			status = "disabled";
		};

		i2c1: i2c@4802a000 {
			compatible = "ti,omap4-i2c";
			#address-cells = <1>;
			#size-cells = <0>;
			ti,hwmods = "i2c2";
			reg = <0x4802a000 0x1000>;
			interrupts = <71>;
			status = "disabled";
		};

		i2c2: i2c@4819c000 {
			compatible = "ti,omap4-i2c";
			#address-cells = <1>;
			#size-cells = <0>;
			ti,hwmods = "i2c3";
			reg = <0x4819c000 0x1000>;
			interrupts = <30>;
			status = "disabled";
		};

		mmc1: mmc@48060000 {
			compatible = "ti,omap4-hsmmc";
			ti,hwmods = "mmc1";
			ti,dual-volt;
			ti,needs-special-reset;
			ti,needs-special-hs-handling;
			dmas = <&edma_xbar 24 0 0
				&edma_xbar 25 0 0>;
			dma-names = "tx", "rx";
			interrupts = <64>;
			interrupt-parent = <&intc>;
			reg = <0x48060000 0x1000>;
			status = "disabled";
		};

		mmc2: mmc@481d8000 {
			compatible = "ti,omap4-hsmmc";
			ti,hwmods = "mmc2";
			ti,needs-special-reset;
			dmas = <&edma 2 0
				&edma 3 0>;
			dma-names = "tx", "rx";
			interrupts = <28>;
			interrupt-parent = <&intc>;
			reg = <0x481d8000 0x1000>;
			status = "disabled";
		};

		mmc3: mmc@47810000 {
			compatible = "ti,omap4-hsmmc";
			ti,hwmods = "mmc3";
			ti,needs-special-reset;
			interrupts = <29>;
			interrupt-parent = <&intc>;
			reg = <0x47810000 0x1000>;
			status = "disabled";
		};

		hwspinlock: spinlock@480ca000 {
			compatible = "ti,omap4-hwspinlock";
			reg = <0x480ca000 0x1000>;
			ti,hwmods = "spinlock";
			#hwlock-cells = <1>;
		};

		wdt2: wdt@44e35000 {
			compatible = "ti,omap3-wdt";
			ti,hwmods = "wd_timer2";
			reg = <0x44e35000 0x1000>;
			interrupts = <91>;
		};

		dcan0: can@481cc000 {
			compatible = "ti,am3352-d_can";
			ti,hwmods = "d_can0";
			reg = <0x481cc000 0x2000>;
			clocks = <&dcan0_fck>;
			clock-names = "fck";
			syscon-raminit = <&scm_conf 0x644 0>;
			interrupts = <52>;
			status = "disabled";
		};

		dcan1: can@481d0000 {
			compatible = "ti,am3352-d_can";
			ti,hwmods = "d_can1";
			reg = <0x481d0000 0x2000>;
			clocks = <&dcan1_fck>;
			clock-names = "fck";
			syscon-raminit = <&scm_conf 0x644 1>;
			interrupts = <55>;
			status = "disabled";
		};

		mailbox: mailbox@480C8000 {
			compatible = "ti,omap4-mailbox";
			reg = <0x480C8000 0x200>;
			interrupts = <77>;
			ti,hwmods = "mailbox";
			#mbox-cells = <1>;
			ti,mbox-num-users = <4>;
			ti,mbox-num-fifos = <8>;
			mbox_wkupm3: wkup_m3 {
				ti,mbox-send-noirq;
				ti,mbox-tx = <0 0 0>;
				ti,mbox-rx = <0 0 3>;
			};
			mbox_pru0: mbox_pru0 {
				ti,mbox-tx = <2 0 0>;
				ti,mbox-rx = <3 0 0>;
			};
			mbox_pru1: mbox_pru1 {
				ti,mbox-tx = <4 0 0>;
				ti,mbox-rx = <5 0 0>;
			};
		};

		timer1: timer@44e31000 {
			compatible = "ti,am335x-timer-1ms";
			reg = <0x44e31000 0x400>;
			interrupts = <67>;
			ti,hwmods = "timer1";
			ti,timer-alwon;
		};

		timer2: timer@48040000 {
			compatible = "ti,am335x-timer";
			reg = <0x48040000 0x400>;
			interrupts = <68>;
			ti,hwmods = "timer2";
		};

		timer3: timer@48042000 {
			compatible = "ti,am335x-timer";
			reg = <0x48042000 0x400>;
			interrupts = <69>;
			ti,hwmods = "timer3";
		};

		timer4: timer@48044000 {
			compatible = "ti,am335x-timer";
			reg = <0x48044000 0x400>;
			interrupts = <92>;
			ti,hwmods = "timer4";
			ti,timer-pwm;
		};

		timer5: timer@48046000 {
			compatible = "ti,am335x-timer";
			reg = <0x48046000 0x400>;
			interrupts = <93>;
			ti,hwmods = "timer5";
			ti,timer-pwm;
		};

		timer6: timer@48048000 {
			compatible = "ti,am335x-timer";
			reg = <0x48048000 0x400>;
			interrupts = <94>;
			ti,hwmods = "timer6";
			ti,timer-pwm;
		};

		timer7: timer@4804a000 {
			compatible = "ti,am335x-timer";
			reg = <0x4804a000 0x400>;
			interrupts = <95>;
			ti,hwmods = "timer7";
			ti,timer-pwm;
		};

		rtc: rtc@44e3e000 {
			compatible = "ti,am3352-rtc", "ti,da830-rtc";
			reg = <0x44e3e000 0x1000>;
			interrupts = <75
				      76>;
			ti,hwmods = "rtc";
			clocks = <&clkdiv32k_ick>;
			clock-names = "int-clk";
		};

		spi0: spi@48030000 {
			compatible = "ti,omap4-mcspi";
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x48030000 0x400>;
			interrupts = <65>;
			ti,spi-num-cs = <2>;
			ti,hwmods = "spi0";
			dmas = <&edma 16 0
				&edma 17 0
				&edma 18 0
				&edma 19 0>;
			dma-names = "tx0", "rx0", "tx1", "rx1";
			status = "disabled";
		};

		spi1: spi@481a0000 {
			compatible = "ti,omap4-mcspi";
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x481a0000 0x400>;
			interrupts = <125>;
			ti,spi-num-cs = <2>;
			ti,hwmods = "spi1";
			dmas = <&edma 42 0
				&edma 43 0
				&edma 44 0
				&edma 45 0>;
			dma-names = "tx0", "rx0", "tx1", "rx1";
			status = "disabled";
		};

		usb: usb@47400000 {
			compatible = "ti,am33xx-usb";
			reg = <0x47400000 0x1000>;
			ranges;
			#address-cells = <1>;
			#size-cells = <1>;
			ti,hwmods = "usb_otg_hs";
			status = "disabled";

			usb_ctrl_mod: control@44e10620 {
				compatible = "ti,am335x-usb-ctrl-module";
				reg = <0x44e10620 0x10
					0x44e10648 0x4>;
				reg-names = "phy_ctrl", "wakeup";
				status = "disabled";
			};

			usb0_phy: usb-phy@47401300 {
				compatible = "ti,am335x-usb-phy";
				reg = <0x47401300 0x100>;
				reg-names = "phy";
				status = "disabled";
				ti,ctrl_mod = <&usb_ctrl_mod>;
			};

			usb0: usb@47401000 {
				compatible = "ti,musb-am33xx";
				status = "disabled";
				reg = <0x47401400 0x400
					0x47401000 0x200>;
				reg-names = "mc", "control";

				interrupts = <18>;
				interrupt-names = "mc";
				dr_mode = "otg";
				mentor,multipoint = <1>;
				mentor,num-eps = <16>;
				mentor,ram-bits = <12>;
				mentor,power = <500>;
				phys = <&usb0_phy>;

				dmas = <&cppi41dma  0 0 &cppi41dma  1 0
					&cppi41dma  2 0 &cppi41dma  3 0
					&cppi41dma  4 0 &cppi41dma  5 0
					&cppi41dma  6 0 &cppi41dma  7 0
					&cppi41dma  8 0 &cppi41dma  9 0
					&cppi41dma 10 0 &cppi41dma 11 0
					&cppi41dma 12 0 &cppi41dma 13 0
					&cppi41dma 14 0 &cppi41dma  0 1
					&cppi41dma  1 1 &cppi41dma  2 1
					&cppi41dma  3 1 &cppi41dma  4 1
					&cppi41dma  5 1 &cppi41dma  6 1
					&cppi41dma  7 1 &cppi41dma  8 1
					&cppi41dma  9 1 &cppi41dma 10 1
					&cppi41dma 11 1 &cppi41dma 12 1
					&cppi41dma 13 1 &cppi41dma 14 1>;
				dma-names =
					"rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
					"rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
					"rx14", "rx15",
					"tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
					"tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
					"tx14", "tx15";
			};

			usb1_phy: usb-phy@47401b00 {
				compatible = "ti,am335x-usb-phy";
				reg = <0x47401b00 0x100>;
				reg-names = "phy";
				status = "disabled";
				ti,ctrl_mod = <&usb_ctrl_mod>;
			};

			usb1: usb@47401800 {
				compatible = "ti,musb-am33xx";
				status = "disabled";
				reg = <0x47401c00 0x400
					0x47401800 0x200>;
				reg-names = "mc", "control";
				interrupts = <19>;
				interrupt-names = "mc";
				dr_mode = "otg";
				mentor,multipoint = <1>;
				mentor,num-eps = <16>;
				mentor,ram-bits = <12>;
				mentor,power = <500>;
				phys = <&usb1_phy>;

				dmas = <&cppi41dma 15 0 &cppi41dma 16 0
					&cppi41dma 17 0 &cppi41dma 18 0
					&cppi41dma 19 0 &cppi41dma 20 0
					&cppi41dma 21 0 &cppi41dma 22 0
					&cppi41dma 23 0 &cppi41dma 24 0
					&cppi41dma 25 0 &cppi41dma 26 0
					&cppi41dma 27 0 &cppi41dma 28 0
					&cppi41dma 29 0 &cppi41dma 15 1
					&cppi41dma 16 1 &cppi41dma 17 1
					&cppi41dma 18 1 &cppi41dma 19 1
					&cppi41dma 20 1 &cppi41dma 21 1
					&cppi41dma 22 1 &cppi41dma 23 1
					&cppi41dma 24 1 &cppi41dma 25 1
					&cppi41dma 26 1 &cppi41dma 27 1
					&cppi41dma 28 1 &cppi41dma 29 1>;
				dma-names =
					"rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
					"rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
					"rx14", "rx15",
					"tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
					"tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
					"tx14", "tx15";
			};

			cppi41dma: dma-controller@47402000 {
				compatible = "ti,am3359-cppi41";
				reg =  <0x47400000 0x1000
					0x47402000 0x1000
					0x47403000 0x1000
					0x47404000 0x4000>;
				reg-names = "glue", "controller", "scheduler", "queuemgr";
				interrupts = <17>;
				interrupt-names = "glue";
				#dma-cells = <2>;
				#dma-channels = <30>;
				#dma-requests = <256>;
				status = "disabled";
			};
		};

		epwmss0: epwmss@48300000 {
			compatible = "ti,am33xx-pwmss";
			reg = <0x48300000 0x10>;
			ti,hwmods = "epwmss0";
			#address-cells = <1>;
			#size-cells = <1>;
			status = "disabled";
			ranges = <0x48300100 0x48300100 0x80   /* ECAP */
				  0x48300180 0x48300180 0x80   /* EQEP */
				  0x48300200 0x48300200 0x80>; /* EHRPWM */

			ecap0: ecap@48300100 {
				compatible = "ti,am33xx-ecap";
				#pwm-cells = <3>;
				reg = <0x48300100 0x80>;
				interrupts = <31>;
				interrupt-names = "ecap0";
				status = "disabled";
			};

			ehrpwm0: pwm@48300200 {
				compatible = "ti,am33xx-ehrpwm";
				#pwm-cells = <3>;
				reg = <0x48300200 0x80>;
				clocks = <&ehrpwm0_tbclk>;
				clock-names = "tbclk";
				status = "disabled";
			};
		};

		epwmss1: epwmss@48302000 {
			compatible = "ti,am33xx-pwmss";
			reg = <0x48302000 0x10>;
			ti,hwmods = "epwmss1";
			#address-cells = <1>;
			#size-cells = <1>;
			status = "disabled";
			ranges = <0x48302100 0x48302100 0x80   /* ECAP */
				  0x48302180 0x48302180 0x80   /* EQEP */
				  0x48302200 0x48302200 0x80>; /* EHRPWM */

			ecap1: ecap@48302100 {
				compatible = "ti,am33xx-ecap";
				#pwm-cells = <3>;
				reg = <0x48302100 0x80>;
				interrupts = <47>;
				interrupt-names = "ecap1";
				status = "disabled";
			};

			ehrpwm1: pwm@48302200 {
				compatible = "ti,am33xx-ehrpwm";
				#pwm-cells = <3>;
				reg = <0x48302200 0x80>;
				clocks = <&ehrpwm1_tbclk>;
				clock-names = "tbclk";
				status = "disabled";
			};
		};

		epwmss2: epwmss@48304000 {
			compatible = "ti,am33xx-pwmss";
			reg = <0x48304000 0x10>;
			ti,hwmods = "epwmss2";
			#address-cells = <1>;
			#size-cells = <1>;
			status = "disabled";
			ranges = <0x48304100 0x48304100 0x80   /* ECAP */
				  0x48304180 0x48304180 0x80   /* EQEP */
				  0x48304200 0x48304200 0x80>; /* EHRPWM */

			ecap2: ecap@48304100 {
				compatible = "ti,am33xx-ecap";
				#pwm-cells = <3>;
				reg = <0x48304100 0x80>;
				interrupts = <61>;
				interrupt-names = "ecap2";
				status = "disabled";
			};

			ehrpwm2: pwm@48304200 {
				compatible = "ti,am33xx-ehrpwm";
				#pwm-cells = <3>;
				reg = <0x48304200 0x80>;
				clocks = <&ehrpwm2_tbclk>;
				clock-names = "tbclk";
				status = "disabled";
			};
		};

		mac: ethernet@4a100000 {
			compatible = "ti,am335x-cpsw","ti,cpsw";
			ti,hwmods = "cpgmac0";
			clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
			clock-names = "fck", "cpts";
			cpdma_channels = <8>;
			ale_entries = <1024>;
			bd_ram_size = <0x2000>;
			no_bd_ram = <0>;
			mac_control = <0x20>;
			slaves = <2>;
			active_slave = <0>;
			cpts_clock_mult = <0x80000000>;
			cpts_clock_shift = <29>;
			reg = <0x4a100000 0x800
			       0x4a101200 0x100>;
			#address-cells = <1>;
			#size-cells = <1>;
			interrupt-parent = <&intc>;
			/*
			 * c0_rx_thresh_pend
			 * c0_rx_pend
			 * c0_tx_pend
			 * c0_misc_pend
			 */
			interrupts = <40 41 42 43>;
			ranges;
			syscon = <&scm_conf>;
			status = "disabled";

			davinci_mdio: mdio@4a101000 {
				compatible = "ti,cpsw-mdio";
				#address-cells = <1>;
				#size-cells = <0>;
				ti,hwmods = "davinci_mdio";
				bus_freq = <1000000>;
				reg = <0x4a101000 0x100>;
				status = "disabled";
			};

			cpsw_emac0: slave@4a100200 {
				/* Filled in by U-Boot */
				mac-address = [ 00 00 00 00 00 00 ];
			};

			cpsw_emac1: slave@4a100300 {
				/* Filled in by U-Boot */
				mac-address = [ 00 00 00 00 00 00 ];
			};

			phy_sel: cpsw-phy-sel@44e10650 {
				compatible = "ti,am3352-cpsw-phy-sel";
				reg= <0x44e10650 0x4>;
				reg-names = "gmii-sel";
			};
		};

		ocmcram: ocmcram@40300000 {
			compatible = "mmio-sram";
			reg = <0x40300000 0x2000>; /* 8k */
			map-exec;
		};

		ocmcram_nocache: ocmcram_nocache@40302000 {
			compatible = "mmio-sram";
			reg = <0x40302000 0xe000>; /* 64k - 8k */
		};

		pruss: pruss@4a300000 {
			compatible = "ti,am3352-pruss";
			ti,hwmods = "pruss";
			reg = <0x4a300000 0x2000>,
			      <0x4a302000 0x2000>,
			      <0x4a310000 0x3000>,
			      <0x4a326000 0x2000>,
			      <0x4a32e000 0x31c>,
			      <0x4a332000 0x58>;
			reg-names = "dram0", "dram1", "shrdram2", "cfg",
				    "iep", "mii_rt";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;

			pruss_intc: intc@4a320000 {
				compatible = "ti,am3352-pruss-intc";
				reg = <0x4a320000 0x2000>;
				reg-names = "intc";
				interrupts = <20 21 22 23 24 25 26 27>;
				interrupt-names = "host2", "host3", "host4",
						  "host5", "host6", "host7",
						  "host8", "host9";
				interrupt-controller;
				#interrupt-cells = <1>;
			};

			pru0: pru0@4a334000 {
				compatible = "ti,am3352-pru";
				reg = <0x4a334000 0x2000>,
				      <0x4a322000 0x400>,
				      <0x4a322400 0x100>;
				reg-names = "iram", "control", "debug";
				interrupt-parent = <&pruss_intc>;
				interrupts = <16>, <17>;
				interrupt-names = "vring", "kick";
			};

			pru1: pru1@4a338000 {
				compatible = "ti,am3352-pru";
				reg = <0x4a338000 0x2000>,
				      <0x4a324000 0x400>,
				      <0x4a324400 0x100>;
				reg-names = "iram", "control", "debug";
				interrupt-parent = <&pruss_intc>;
				interrupts = <18>, <19>;
				interrupt-names = "vring", "kick";
			};

			pruss_mdio: mdio@4a332400 {
				compatible = "ti,davinci_mdio";
				reg = <0x4a332400 0x90>;
				clocks = <&dpll_core_m4_ck>;
				clock-names = "fck";
				bus_freq = <1000000>;
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};
		};

		elm: elm@48080000 {
			compatible = "ti,am3352-elm";
			reg = <0x48080000 0x2000>;
			interrupts = <4>;
			ti,hwmods = "elm";
			status = "disabled";
		};

		lcdc: lcdc@4830e000 {
			compatible = "ti,am33xx-tilcdc";
			reg = <0x4830e000 0x1000>;
			interrupt-parent = <&intc>;
			interrupts = <36>;
			ti,hwmods = "lcdc";
			status = "disabled";
		};

		tscadc: tscadc@44e0d000 {
			compatible = "ti,am3359-tscadc";
			reg = <0x44e0d000 0x1000>;
			interrupt-parent = <&intc>;
			interrupts = <16>;
			ti,hwmods = "adc_tsc";
			status = "disabled";

			tsc {
				compatible = "ti,am3359-tsc";
			};
			am335x_adc: adc {
				#io-channel-cells = <1>;
				compatible = "ti,am3359-adc";
			};
		};

		gpmc: gpmc@50000000 {
			compatible = "ti,am3352-gpmc";
			ti,hwmods = "gpmc";
			ti,no-idle-on-init;
			reg = <0x50000000 0x2000>;
			interrupts = <100>;
			dmas = <&edma 52 0>;
			dma-names = "rxtx";
			gpmc,num-cs = <7>;
			gpmc,num-waitpins = <2>;
			#address-cells = <2>;
			#size-cells = <1>;
			interrupt-controller;
			#interrupt-cells = <2>;
			gpio-controller;
			#gpio-cells = <2>;
			status = "disabled";
		};

		sham: sham@53100000 {
			compatible = "ti,omap4-sham";
			ti,hwmods = "sham";
			reg = <0x53100000 0x200>;
			interrupts = <109>;
			dmas = <&edma 36 0>;
			dma-names = "rx";
		};

		aes: aes@53500000 {
			compatible = "ti,omap4-aes";
			ti,hwmods = "aes";
			reg = <0x53500000 0xa0>;
			interrupts = <103>;
			dmas = <&edma 6 0>,
			       <&edma 5 0>;
			dma-names = "tx", "rx";
		};

		mcasp0: mcasp@48038000 {
			compatible = "ti,am33xx-mcasp-audio";
			ti,hwmods = "mcasp0";
			reg = <0x48038000 0x2000>,
			      <0x46000000 0x400000>;
			reg-names = "mpu", "dat";
			interrupts = <80>, <81>;
			interrupt-names = "tx", "rx";
			status = "disabled";
			dmas = <&edma 8 2>,
				<&edma 9 2>;
			dma-names = "tx", "rx";
		};

		mcasp1: mcasp@4803C000 {
			compatible = "ti,am33xx-mcasp-audio";
			ti,hwmods = "mcasp1";
			reg = <0x4803C000 0x2000>,
			      <0x46400000 0x400000>;
			reg-names = "mpu", "dat";
			interrupts = <82>, <83>;
			interrupt-names = "tx", "rx";
			status = "disabled";
			dmas = <&edma 10 2>,
				<&edma 11 2>;
			dma-names = "tx", "rx";
		};

		rng: rng@48310000 {
			compatible = "ti,omap4-rng";
			ti,hwmods = "rng";
			reg = <0x48310000 0x2000>;
			interrupts = <111>;
		};

		/*
		 * The SGX is disabled by default because it is an optional
		 * module and only some AM335x variants contain this module,
		 * such as AM3358 and AM3357. The status should be overwritten
		 * as "OK" at the corresponding board.dts.
		 */
		sgx: sgx@56000000 {
			compatible = "ti,am3352-sgx530", "img,sgx530";
			ti,hwmods = "gfx";
			reg = <0x56000000 0x10000>;
			interrupts = <37>;
			clocks = <&gfx_fck_div_ck>;
			clock-names = "fclk";
			status = "disabled";
		};
	};
};

/include/ "am33xx-clocks.dtsi"

Thanks!

  • Hi,

    What Linux version are you using?
  • TI Linux SDK (03.01.00.06)
  • More info:

    I have an older custom board that has the same identical Broadcom BCM5461s PHY connected by RGMII, but only one of them. It ran Debian 3.2 that used a board.c instead of device tree files. I tried running the SD card that I made for our new board (TI Linux SDK 03.01.00.06) on this old board and it has the same behavior - I get link up/down status, but it won't get an IP. The new board has too many differences to boot up with the old Debian 3.2.

    Basically, I am also trying to isolate the new board having something wrong hardware-wise. That's why I am going back to an old board that I know works with the old Debian 3.2. So, the goal now is to get the old board working with TI Linux SDK 03.01.00.06.

    The only thing I can think of is that the configuration for RGMII is not correct.

  • More info #2:

    The 'old' board was designed to only connect at 10/100 (even though the BCM5461s can do 10/100/1000).

    I measured the TXCLK and I have 25MHz with the old Debian 3.2 SD card, but get ~26.04MHz with the TI Linux SD card. It should be 25MHz for 100mbit.

    This leads me to believe something with my clock setup is wrong. We are using 25MHz for the input to the am335x versus 24Mhz on the Beaglebone. Do I need to change something in am33xx-clocks.dtsi or maybe in some other file?

    Another thing is that we are running a 600MHz am335x versus 1GHz on the Beaglebone. I have not made any device tree changes for this either.

  • It sounds like your system thinks you are using a 24MHz crystal when you are actually using a 25MHz crystal.  If you divide 25 by 24 and multiply the result by 25, you get 26.04. So check your SYSBOOT configuration for the proper reference clock frequency.

    Regards,
    Paul

  • SYSBOOT pins are correctly set for 25MHz. Otherwise the old SD card running Debian 3.2 wouldn't work either, but it does.
  • Where do I set the 'N' divider? Mine is currently set to 23 and I believe it needs to be 24 for 25MHz input.

    'omapconf show dpll' returns:

    |--------------------------------------------|
    | DPLL Configuration         | DPLL_PER      |
    |--------------------------------------------|
    | Status                     | Locked        |
    |                            |               |
    | Mode                       | Lock          |
    | Automatic Control          | Not Supported |
    |  LPST = Low-Power STop     |               |
    |  LPBP = Low-Power ByPass   |               |
    |  FRBP = Fast-Relock ByPass |               |
    |  MNBP = MN ByPass          |               |
    |                            |               |
    | Sigma-Delta Divider        | 4             |
    | SELFREQDCO                 | 0             |
    |                            |               |
    | Ref. Frequency (MHz)       | 25.000        |
    | M Multiplier Factor        | 960           |
    | N Divider Factor           | 23            |
    | Lock Frequency (MHz)       | 1000          |
    |                            |               |
    | CLKOUT Output              |               |
    |   Status                   | Enabled       |
    |   Clock Divider            | 5             |
    |   Clock Speed (MHz)        | 200           |
    |                            |               |
    | CLK_DCO_LDO Output         |               |
    |   Status                   | Enabled       |
    |   Clock Speed (MHz)        | 1000          |
    |                            |               |
    |--------------------------------------------|
    
    |---------------------------------------------------------------------------------------------|
    | DPLL Configuration          | DPLL_CORE     | DPLL_MPU      | DPLL_DDR      | DPLL_DISP     |
    |---------------------------------------------------------------------------------------------|
    | Status                      | Locked        | Locked        | Locked        | Bypassed      |
    |                             |               |               |               |               |
    | Mode                        | Lock          | Lock          | Lock          | MNBP          |
    | Automatic Control           | Not Supported | Not Supported | Not Supported | Not Supported |
    |  LPBP = Low-Power ByPass    |               |               |               |               |
    |  FRBP = Fast-Relock ByPass  |               |               |               |               |
    |  MNBP = MN ByPass           |               |               |               |               |
    | Low-Power Mode              | Disabled      | Disabled      | Disabled      | Disabled      |
    |                             |               |               |               |               |
    | Automatic Recalibration     | Disabled      | Disabled      | Disabled      | Disabled      |
    | Clock Ramping during Relock | Disabled      | Disabled      | Disabled      | Disabled      |
    | Ramping Rate (x REFCLK(s))  | 2             | 2             | 2             | 2             |
    | Ramping Levels              | No Ramp       | No Ramp       | No Ramp       | No Ramp       |
    |                             |               |               |               |               |
    | Bypass Clock                | CLKINP        | CLKINP        | CLKINP        | CLKINP        |
    | Bypass Clock Divider        |               |               |               |               |
    | REGM4XEN Mode               | Disabled      | Disabled      | Disabled      | Disabled      |
    |                             |               |               |               |               |
    | Ref. Frequency (MHz)        | 25.000        | 25.000        | 25.000        | 25.000        |
    | M Multiplier Factor         | 1000          | 12            | 400           | 0             |
    | N Divider Factor            | 23            | 0             | 23            | 0             |
    | Lock Frequency (MHz)        | 1041          | 300           | 416           | 0 (0)         |
    |                             |               |               |               |               |
    | M2 Output                   |               |               |               |               |
    |   Status                    |               | Enabled       | Enabled       | Gated         |
    |   Clock Divider             |               | 1             | 1             | 1             |
    |   Clock Speed (MHz)         |               | 300           | 416           | 25 (25)       |
    |                             |               |               |               |               |
    | CLK_DCO_LDO Output          |               |               |               |               |
    |   Status                    | Gated         |               |               |               |
    |   Clock Speed (MHz)         | 2083          |               |               |               |
    |                             |               |               |               |               |
    |                             |               |               |               |               |
    | M4 Output                   |               |               |               |               |
    |   Status                    | Enabled       |               |               |               |
    |   Clock Divider             | 10            |               |               |               |
    |   Clock Speed (MHz)         | 208           |               |               |               |
    |                             |               |               |               |               |
    | M5 Output                   |               |               |               |               |
    |   Status                    | Enabled       |               |               |               |
    |   Clock Divider             | 8             |               |               |               |
    |   Clock Speed (MHz)         | 260           |               |               |               |
    |                             |               |               |               |               |
    | M6 Output                   |               |               |               |               |
    |   Status                    | Gated         |               |               |               |
    |   Clock Divider             | 4             |               |               |               |
    |   Clock Speed (MHz)         | 520           |               |               |               |
    |---------------------------------------------------------------------------------------------|

  • U-Boot SPL was set for the wrong frequency causing the 'N' clock divider to be wrong. After correcting that, I can now link up at 100mbit, but still not a 1gbit. I measured the TXCLK and it's correct (25MHz for 100mbit and 125MHz for 1gbit.)

    Any ideas?
  • First verify that both the local PHY and the link partner are configured to advertise 1G support. This can be done by reading the local PHY's configuration registers via uBoot's embedded 'MII DUMP' command (or a Linux alternative).
  • The thing is that everything looks like it's negotiating properly at 1G. I see the correct leds on the external switch and Linux tells me the link is up at 1G. Also, TXCLK changes accordingly to 125MHz at 1G instead of 25MHz at 100M. All looks good except that it won't get an IP by dhcp and setting the IP manually doesn't make it 'connectable' either.
  • Fixed the problem, the RXCLK signal from the PHY was not clean. The previous board had an inductor inline that needed to be removed on the new board.
  • What does ethtool eth0 show?
    Do you have wireshark installed? If so does it show packets being sent out of the port during the udhcpc command?
  • You missed my previous reply. Basically, the problem was that the RXCLK signal was not clean. It must have been marginal to work at 100M, but too bad to work at 1G.