GLSDK dra75x 2gb sdram support

yangwoo Lee

Other Parts Discussed in Thread: DRA752, DRA742, BEAGLEBOARD-X15

Hello

We have custom board based from Jacinto6 EVM

Latest Jacinto6(DRA752_ES2_0) looks supporting 2Gbyte sdram memory. I could see "DRAM: 4GiB" memory on u-boot print message.

Our custom board(DRA752_ES1_1) also has 2Gbyte sdram. Two 1Gbyte memory are connected to each emif0 and emif1(total size is 2Gbyte)

We are using struct definition "lisa_map_dra7_2GB" same as EVM board(DRA752_ES2_0).

But alike EVM u-boot log message, Our board printing "DRAM: 8 GiB". (I expected DRAM: 4 GiB like EVM)

But kernel printing "Memory: 1467668K/2079744K"

I'm afraid this configuration will create problem.

Tell me this setting is correct or not. If not, please tell me correct lisa map configuration.

File: board/ti/dra7xx/evm.c

struct:

const struct dmm_lisa_map_regs lisa_map_dra7_2GB = {
.dmm_lisa_map_0 = 0x0,
.dmm_lisa_map_1 = 0x0,
.dmm_lisa_map_2 = 0x80740300,
.dmm_lisa_map_3 = 0xFF020100,
.is_ma_present = 0x1
};

over 8 years ago

0 Pavel Botev over 8 years ago

TI__Guru**** 170625 points

Hi Yangwoo,

Jacinto6 EVM (DRA75x EVM, Vayu EVM) comes with 4GByte DDR3 RAM.

EMIF1 has 2Gbyte DDR3 RAM total (2 chips of MT41K512M16)
EMIF2 has 2Gbyte DDR3 RAM total (4 chips of MT41K512M8)

From what I understand on your custom board you have 2GByte DDR3 RAM? EMIF1 has 1GByte total? EMIF2 has 1GByte total?

Regards,
Pavel

0 yangwoo Lee over 8 years ago in reply to Pavel Botev

Intellectual 910 points

Hello Pavel

Thank you for your answer.

Below is our configuration.(supporting 2Gbyte)

EMIF1 => MT41K256M16TW + MT41K256M16TW + MT41K256M8DA

EMIF2 => MT41K256M16TW + MT41K256M16TW

0 Pavel Botev over 8 years ago

TI__Guru**** 170625 points

yangwoo Lee said:
I could see "DRAM: 4GiB" memory on u-boot print message.

yangwoo Lee said:
But alike EVM u-boot log message, Our board printing "DRAM: 8 GiB". (I expected DRAM: 4 GiB like EVM)

For your custom board, this should be "DRAM: 2GiB", right? Can you provide me the full u-boot console message?

Do you use u-boot/board/ti/dra7xx/evm.c file or you made your own file for your custom board? In evm.c file (or the file you have there), in function dram_init_banksize, what you have in ram_size? What you have in gd->bd->bi_dram[0].size and gd->bd->bi_dram[1].size?

yangwoo Lee said:
.dmm_lisa_map_2 = 0x80740300,

For 1GByte per EMIF, the value should be:

.dmm_lisa_map_0 = 0x0,
.dmm_lisa_map_1 = 0x0,
.dmm_lisa_map_2 = 0x80640300,
.dmm_lisa_map_3 = 0xFF020100,

.dmm_lisa_map_0 = 0x0,
.dmm_lisa_map_1 = 0x0,
.dmm_lisa_map_2 = 0x0,
.dmm_lisa_map_3 = 0x80740300,

See the below e2e threads for more info:

Regards,
Pavel

0 yangwoo Lee over 8 years ago in reply to Pavel Botev

Intellectual 910 points

I'm using "board/ti/dra7xx/evm.c" with some modification. It always run "*dmm_lisa_regs = &lisa_map_dra7_2GB;" which is defined for EVM.
Because our custom board does not have eeprom infomation(actually not programed), I can't get any information from function "dram_init_banksize.(As I know ram_size is from eeprom)
Only I have information from schematic like below.
EMIF1 => MT41K256M16TW + MT41K256M16TW + MT41K256M8DA
EMIF2 => MT41K256M16TW + MT41K256M16TW

And I tried two configuration which is

.dmm_lisa_map_0 = 0x0,
.dmm_lisa_map_1 = 0x0,
.dmm_lisa_map_2 = 0x80640300,
.dmm_lisa_map_3 = 0xFF020100,
==> Above configuration printed DRAM: 7GiB

.dmm_lisa_map_0 = 0x0,
.dmm_lisa_map_1 = 0x0,
.dmm_lisa_map_2 = 0x0,
.dmm_lisa_map_3 = 0x80740300,
==> Above configuration printed DRAM: 8GiB

Thank you for helping me.

< log>
CPU : DRA752-GP ES1.1
Board: DRA74x EVM REV @.65535
I2C: ready
DRAM: 8 GiB
MMC: OMAP SD/MMC: 0, OMAP SD/MMC: 1
Using default environment

serial# not set, setting...
Net: <ethaddr> not set. Validating first E-fuse MAC
cpsw
Hit any key to stop autoboot: 0
switch to partitions #0, OK
mmc0 is current device
SD/MMC found on device 0
reading uEnv.txt
444 bytes read in 3 ms (144.5 KiB/s)
Loaded environment from uEnv.txt
Importing environment from mmc0 ...
4143680 bytes read in 225 ms (17.6 MiB/s)
105995 bytes read in 28 ms (3.6 MiB/s)
Booting from mmc0 ...
Kernel image @ 0x82000000 [ 0x000000 - 0x3f3a40 ]
## Flattened Device Tree blob at 88000000
Booting using the fdt blob at 0x88000000
reserving fdt memory region: addr=84000000 size=fc10000
reserving fdt memory region: addr=a2000000 size=4000000
reserving fdt memory region: addr=a0000000 size=2000000
Loading Device Tree to 83fe3000, end 83fffe0a ... OK

Starting kernel ...

[ 0.000000] Booting Linux on physical CPU 0x0
[ 0.000000] Linux version 3.14.63 (ywlee@clusterserver1) (gcc version 4.7.3 20130226 (prerelease) (crosstool-NG linaro-1.13.1-4.7-2013.03-20130313 - Linaro GCC 2013.03) ) #1 SMP PREEMPT Mon Nov 14 10:03:00 KST 2016
[ 0.000000] CPU: ARMv7 Processor [412fc0f2] revision 2 (ARMv7), cr=10c5387d
[ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache
[ 0.000000] Ignoring memory below PHYS_OFFSET: 0x00000000-0x7ffffffe
[ 0.000000] Machine model: TI DRA742
[ 0.000000] Reserved memory: created CMA memory pool at 0x95800000, size 56 MiB
[ 0.000000] Reserved memory: initialized node ipu2_cma@95800000, compatible id shared-dma-pool
[ 0.000000] Reserved memory: created CMA memory pool at 0x99000000, size 64 MiB
[ 0.000000] Reserved memory: initialized node dsp1_cma@99000000, compatible id shared-dma-pool
[ 0.000000] Reserved memory: created CMA memory pool at 0x9d000000, size 32 MiB
[ 0.000000] Reserved memory: initialized node ipu1_cma@9d000000, compatible id shared-dma-pool
[ 0.000000] Reserved memory: created CMA memory pool at 0x9f000000, size 8 MiB
[ 0.000000] Reserved memory: initialized node dsp2_cma@9f000000, compatible id shared-dma-pool
[ 0.000000] cma: CMA: reserved 64 MiB at ab800000
[ 0.000000] Memory policy: Data cache writealloc
[ 0.000000] DRA752 ES1.1
[ 0.000000] PERCPU: Embedded 8 pages/cpu @ea760000 s8640 r8192 d15936 u32768
[ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 518416
[ 0.000000] Kernel command line: console=ttyS0,115200n8 elevator=noop root=PARTUUID=302412c5-02 rw rootwait earlyprintk fixrtc omapdrm.num_crtc=4 consoleblank=0 cma=64M rootfstype=ext4 snd.slots_reserved=1,1 video=Unknown-1:1280x720@60e video=Unknown-2:1280x720@60e video=Unknown-3:1280x720@60e video=HDMI-A-1:1920x720@60e vt.global_cursor_default=1
[ 0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes)
[ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes)
[ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes)
[ 0.000000] Memory: 1467668K/2079744K available (5395K kernel code, 331K rwdata, 2116K rodata, 280K init, 235K bss, 612076K reserved, 1301504K highmem)
[ 0.000000] Virtual kernel memory layout:
[ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB)
[ 0.000000] fixmap : 0xfff00000 - 0xfffe0000 ( 896 kB)
[ 0.000000] vmalloc : 0xf0000000 - 0xff000000 ( 240 MB)
[ 0.000000] lowmem : 0xc0000000 - 0xef800000 ( 760 MB)
[ 0.000000] pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB)
[ 0.000000] modules : 0xbf000000 - 0xbfe00000 ( 14 MB)
[ 0.000000] .text : 0xc0008000 - 0xc075e034 (7513 kB)
[ 0.000000] .init : 0xc075f000 - 0xc07a51c0 ( 281 kB)
[ 0.000000] .data : 0xc07a6000 - 0xc07f8df8 ( 332 kB)
[ 0.000000] .bss : 0xc07f8e04 - 0xc0833a1c ( 236 kB)

0 Pavel Botev over 8 years ago in reply to yangwoo Lee

TI__Guru**** 170625 points

yangwoo Lee said:
I'm using "board/ti/dra7xx/evm.c" with some modification. It always run "*dmm_lisa_regs = &lisa_map_dra7_2GB;" which is defined for EVM.

What about the default settings in lisa_map_dra7_2GB? What you have for DRAM when using the default lisa_map_dra7_2GB settings?

yangwoo Lee said:
DRAM: 8 GiB

Can you re-build your u-boot with CONFIG_CMD_MEMINFO=y and then use the meminfo command (and bdinfo command) in the u-boot prompt. Try the below sequence:

u-boot> help

u-boot> bdinfo

u-boot> meminfo

See the below file for more info:

u-boot/cmd/mem.c

Regards,
Pavel

0 Pavel Botev over 8 years ago in reply to Pavel Botev

TI__Guru**** 170625 points

Can you also enable debug in u-boot, to see the messages under debug() and #ifdef DEBUG? These debug messages will help us to find the root cause. The files of interest are:

u-boot/common/board_f.c
u-boot/arch/arm/cpu/armv7/omap-common/emif-common.c

Also, in function sdram_init() called from dram_init(), what you have in size_prog and size_detect?

u-boot/arch/arm/cpu/armv7/omap-common/hwinit-common.c
u-boot/arch/arm/cpu/armv7/omap-common/emif-common.c

void sdram_init(void)
{

size_prog = omap_sdram_size();

size_detect = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, size_prog);

}

Regards,
Pavel

0 Pavel Botev over 8 years ago in reply to yangwoo Lee

TI__Guru**** 170625 points

yangwoo Lee said:
Only I have information from schematic like below.
EMIF1 => MT41K256M16TW + MT41K256M16TW + MT41K256M8DA
EMIF2 => MT41K256M16TW + MT41K256M16TW

yangwoo Lee said:
.dmm_lisa_map_0 = 0x0,
.dmm_lisa_map_1 = 0x0,
.dmm_lisa_map_2 = 0x0,
.dmm_lisa_map_3 = 0x80740300,
==> Above configuration printed DRAM: 8GiB

Note that AM572x based BeagleBoard-X15 has the same DDR3 configuration as your custom board:

EMIF1 => 256M16 + 256M16

EMIF2 => 256M16 + 256M16

It has 1Gbyte on EMIF1 and 1GByte on EMIF2, total 2GByte.

And it is using the below configuration:

u-boot/board/ti/am57xx/board.c

static const struct dmm_lisa_map_regs beagle_x15_lisa_regs = {
.dmm_lisa_map_3 = 0x80740300,
.is_ma_present = 0x1
};

*dmm_lisa_regs = &beagle_x15_lisa_regs;

Could you please share your dra7xx/evm.c file? You can attach here in the forum.

Regards,
Pavel

0 yangwoo Lee over 8 years ago in reply to Pavel Botev

Intellectual 910 points

Please check below log.

const struct dmm_lisa_map_regs lisa_map_dra7_2GB = {
    .dmm_lisa_map_0 = 0x0,
    .dmm_lisa_map_1 = 0x0,
    .dmm_lisa_map_2 = 0x80740300,
    .dmm_lisa_map_3 = 0xFF020100,
    .is_ma_present = 0x1
};

U-Boot 2014.07-00021-g66e7037-dirty (Nov 16 2016 - 06:51:18)

CPU : DRA752-GP ES1.1
Board: DRA74x EVM REV @.65535
I2C: ready
DRAM: 8 GiB
MMC: OMAP SD/MMC: 0, OMAP SD/MMC: 1
Using default environment

serial# not set, setting...
Net:   <ethaddr> not set. Validating first E-fuse MAC
cpsw
Hit any key to stop autoboot: 0
U-Boot#
U-Boot#
U-Boot#
U-Boot#
U-Boot# meminfo
DRAM: 2 GiB
U-Boot# bdinfo
arch_number = 0x00000000
boot_params = 0x80000100
DRAM bank   = 0x00000000
-> start    = 0x80000000
-> size     = 0x7F000000
DRAM bank   = 0x00000001
-> start    = 0x00000000
-> size     = 0x7FFFFFFE
eth0name    = cpsw
current eth = cpsw
ip_addr     = <NULL>
baudrate    = 115200 bps
TLB addr    = 0xFEFF0000
relocaddr   = 0xFE752000
reloc off   = 0x7DF52000
irq_sp      = 0xFD731DA0
sp start    = 0xFD731D90
U-Boot#

0 yangwoo Lee over 8 years ago in reply to yangwoo Lee

Intellectual 910 points

const struct dmm_lisa_map_regs lisa_map_dra7_1GB = {
.dmm_lisa_map_0 = 0x0,
.dmm_lisa_map_1 = 0x0,
.dmm_lisa_map_2 = 0x0,
.dmm_lisa_map_3 = 0x80740300,
.is_ma_present = 0x1
};

U-Boot 2014.07-00021-g66e7037-dirty (Nov 16 2016 - 06:59:14)

CPU : DRA752-GP ES1.1
Board: DRA74x EVM REV @.65535
I2C: ready
DRAM: 8 GiB
MMC: OMAP SD/MMC: 0, OMAP SD/MMC: 1
Using default environment

serial# not set, setting...
Net: <ethaddr> not set. Validating first E-fuse MAC
cpsw
Hit any key to stop autoboot: 0
U-Boot#
U-Boot#
U-Boot#
U-Boot# bdinfo
arch_number = 0x00000000
boot_params = 0x80000100
DRAM bank = 0x00000000
-> start = 0x80000000
-> size = 0x80000000
DRAM bank = 0x00000001
-> start = 0x00000000
-> size = 0x7FFFFFFE
eth0name = cpsw
current eth = cpsw
ip_addr = <NULL>
baudrate = 115200 bps
TLB addr = 0xFFFF0000
relocaddr = 0xFF752000
reloc off = 0x7EF52000
irq_sp = 0xFE731DA0
sp start = 0xFE731D90
U-Boot# meminfo
DRAM: 2 GiB
U-Boot#

0 yangwoo Lee over 8 years ago in reply to yangwoo Lee

Intellectual 910 points

Hello Pavel
I don't have idea how to share evm.c this system seems not support file update.
I'm using below SRC_URI and commit id.
git://git.omapzoom.org/repo/u-boot.git
BRANCH = p-ti-u-boot-2014.07
commit = 9e889feee086fd1469bc4728e669cf84898fe0cf

And about evm.c, I applied only below modification
+++ b/board/ti/dra7xx/evm.c
@@ -253,10 +253,14 @@ void emif_get_dmm_regs(const struct dmm_lisa_map_regs **dmm_lisa_regs
        case DRA752_ES1_0:
        case DRA752_ES1_1:
        case DRA752_ES2_0:
+#ifdef CONFIG_SMARTCAR
+                       *dmm_lisa_regs = &lisa_map_dra7_2GB;
+#else
                if (ram_size > CONFIG_MAX_MEM_MAPPED)
                        *dmm_lisa_regs = &lisa_map_dra7_2GB;
                else
                        *dmm_lisa_regs = &lisa_map_dra7_1536MB;
+#endif
                break;
        case DRA722_ES1_0:
        default:
diff --git a/include/configs/dra7xx_brain.h b/include/configs/dra7xx_brain.h
index d883331..9b10e0b 100644
--- a/include/configs/dra7xx_brain.h
+++ b/include/configs/dra7xx_brain.h
@@ -14,6 +14,7 @@

#define CONFIG_DRA7XX
#define CONFIG_DRA7XX_JAMR3
+#define CONFIG_SMARTCAR

0 yangwoo Lee over 8 years ago in reply to yangwoo Lee

Intellectual 910 points

Below is printed message with #define DEBUG
Used config is...
.dmm_lisa_map_3 = 0x80740300,
.is_ma_present = 0x1

...

>>sdram_init()
in_sdram = 0
>>do_sdram_init() 4c000000
<<do_sdram_init() 4c000000
>>do_sdram_init() 4d000000
<<do_sdram_init() 4d000000
get_ram_size() successful<<sdram_init()
>>spl:board_init_r()
dram_bank_mmu_setup: bank: 0
dram_bank_mmu_setup: bank: 1

...

DRAM: initcall: 8080098c
>>sdram_init()
initcall: 80809458
Monitor len: 008A7100
Ram size: 80000000
Ram top: 00000000
initcall: 80809004
initcall: 80809214
TLB table from ffff0000 to ffff4000
initcall: 8080901c
initcall: 808091c8
Reserving 8860k for U-Boot at: ff748000
initcall: 80809198
Reserving 16512k for malloc() at: fe728000
initcall: 8080929c
Reserving 112 Bytes for Board Info at: fe727f90
initcall: 80809024
initcall: 80809164
Reserving 472 Bytes for Global Data at: fe727db8
initcall: 80809100
initcall: 8080902c
initcall: 80809440
initcall: 80809394

RAM Configuration:
Bank #0: 80000000 2 GiB
Bank #1: 200000000 6 GiB
DRAM: 8 GiB

U-Boot# meminfo
DRAM: 2 GiB

0 Pavel Botev over 8 years ago in reply to yangwoo Lee

TI__Guru**** 170625 points

yangwoo Lee said:
+#ifdef CONFIG_SMARTCAR
+                       *dmm_lisa_regs = &lisa_map_dra7_2GB;
+#else
                if (ram_size > CONFIG_MAX_MEM_MAPPED)
                        *dmm_lisa_regs = &lisa_map_dra7_2GB;
                else
                        *dmm_lisa_regs = &lisa_map_dra7_1536MB;
+#endif

Can you create new struct for your board and pass that new structure. Will be there any difference?

const struct dmm_lisa_map_regs lisa_map_2G_x_4_custom = {
.dmm_lisa_map_3 = 0x80740300,
.is_ma_present = 0x1
};

#ifdef CONFIG_SMARTCAR
*dmm_lisa_regs = &lisa_map_2G_x_4_custom;
#else

Can you also check these lisa map registers with md command from the u-boot prompt?

u-boot> md 0x4E000040 1
u-boot> md 0x4E000044 1
u-boot> md 0x4E000048 1
u-boot> md 0x4E00004C 1

Also, in function sdram_init() called from dram_init(), what you have in size_prog and size_detect?

u-boot/arch/arm/cpu/armv7/omap-common/hwinit-common.c
u-boot/arch/arm/cpu/armv7/omap-common/emif-common.c

void sdram_init(void)
{

size_prog = omap_sdram_size();

size_detect = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, size_prog);

}

Regards,
Pavel

0 Pavel Botev over 8 years ago in reply to yangwoo Lee

TI__Guru**** 170625 points

yangwoo Lee said:
I'm using below SRC_URI and commit id.
git://git.omapzoom.org/repo/u-boot.git
BRANCH = p-ti-u-boot-2014.07
commit = 9e889feee086fd1469bc4728e669cf84898fe0cf

The right source for u-boot is git://git.omapzoom.org/repo/u-boot.git or git://git.ti.com/ti-u-boot/ti-u-boot.git.

The branch is:

p-ti-u-boot-2016.05

Can you try with p-ti-u-boot-2016.05? Please also share your steps to build and load u-boot at your board.

Regards,
Pavel

0 Pavel Botev over 8 years ago in reply to yangwoo Lee

TI__Guru**** 170625 points

yangwoo Lee said:
U-Boot 2014.07-00021-g66e7037-dirty (Nov 16 2016 - 06:59:14)

CPU : DRA752-GP ES1.1
Board: DRA74x EVM REV @.65535
I2C: ready
DRAM: 8 GiB
MMC: OMAP SD/MMC: 0, OMAP SD/MMC: 1

yangwoo Lee said:
U-Boot# bdinfo
arch_number = 0x00000000
boot_params = 0x80000100
DRAM bank = 0x00000000
-> start = 0x80000000
-> size = 0x80000000
DRAM bank = 0x00000001
-> start = 0x00000000
-> size = 0x7FFFFFFE

I tested u-boot-2016.05 on the AM572x EVM, which has the same configuration as yours (1GB on EMIF1, 1GB on EMIF2). It report DRAM size successful:

U-Boot 2016.05-00118-gdd926c6-dirty (Oct 11 2016 - 17:55:31 +0300)

CPU  : DRA752-GP ES1.1
Board: AM572x EVM REV A.20
I2C:   ready
DRAM:  2 GiB
MMC:   OMAP SD/MMC: 0, OMAP SD/MMC: 1

=> bdinfo
arch_number = 0x00000000
boot_params = 0x80000100
DRAM bank   = 0x00000000
-> start    = 0x80000000
-> size     = 0x80000000
DRAM bank   = 0x00000001
-> start    = 0x00000000
-> size     = 0x00000000

=> md 0x4E000040 1
4e000040: 00000000                               
=> md 0x4E000044 1
4e000044: 00000000                               
=> md 0x4E000048 1
4e000048: 00000000                               
=> md 0x4E00004C 1
4e00004c: 80740300

0 Pavel Botev over 8 years ago in reply to Pavel Botev

TI__Guru**** 170625 points

When we run u-boot 2016.05 on the DRA75x EVM (which is old revision, comes with 1.5GB RAM) we have:

U-Boot 2016.05-gfb0606103e (Oct 24 2016 - 10:04:46 +0530)

CPU : DRA752-GP ES1.1

Model: TI DRA742

Board: DRA74x EVM REV G.0

DRAM: 1.5 GiB

MMC: OMAP SD/MMC: 0, OMAP SD/MMC:

=> bdinfo

arch_number = 0x00000FE6

boot_params = 0x80000100

DRAM bank = 0x00000000

-> start = 0x80000000

-> size = 0x60000000

DRAM bank = 0x00000001

-> start = 0x00000000

-> size = 0x00000000

=> md 0x4E000040 1

4e000040: 00000000

=> md 0x4E000044 1

4e000044: 80640300

=> md 0x4E000048 1

4e000048: c0500220

=> md 0x4E00004C 1

4e00004c: ff020100

0 yangwoo Lee over 8 years ago in reply to Pavel Botev

Intellectual 910 points

Sorry for late reply.

I really appreciate for your help.

Your test is right.

.dmm_lisa_map_3 = 0x80740300,
.is_ma_present = 0x1

Above is correct configuration for 2GiB(EMIF0 1GiB + EMIF1 1GiB).

I tried other same borad(manufactured by the same schematic) with above configuration. That board is printing "2GiB" correctly

(I have not tried detailed test the second board)

First tested board is someting strange. I don't know why board printing like below

RAM Configuration:
Bank #0: 80000000 2 GiB
Bank #1: 200000000 6 GiB
DRAM: 8 GiB

U-Boot# meminfo
DRAM: 2 GiB

The message that is automatically with boot is

Bank #0: 80000000 2 GiB
Bank #1: 200000000 6 GiB

And, when I type command "meminfo", As a result I can see "DRAM: 2 GiB"

Today I will add "#define DEBUG" to second board, and check it with first board.

There seems to be board deviation.

0 yangwoo Lee over 8 years ago in reply to yangwoo Lee

Intellectual 910 points

I tested both with exatly same u-boot.img, MLO
Log message is almost same, except below part
I don't know, why Bank #1 of first test board recoginize 6GiB

<First test board>
RAM Configuration:
Bank #0: 80000000 2 GiB
Bank #1: 200000000 6 GiB
DRAM: 8 GiB
U-Boot# meminfo
DRAM: 2 GiB

<Second test board>
RAM Configuration:
Bank #0: 80000000 2 GiB
Bank #1: 0 0 Bytes
DRAM: 2 GiB
U-Boot# meminfo
DRAM: 2 GiB

0 Pavel Botev over 8 years ago in reply to yangwoo Lee

TI__Guru**** 170625 points

Yangwoo,

The DDR3 chips on your first and second custom boards are the same , right?

u-boot 2016.05 code is correct, we prove it on AM572x EVM, DRA75x EVM and one of your custom board. The reason for issue on your second custom board is most probably HW malfunction. I would suggest to double check your second board DDR3 schematics/pins and PCB layout. You can also run mtest.

See the below pointers for more info:

processors.wiki.ti.com/.../DM816x_C6A816x_AM389x_DDR3_Init

processors.wiki.ti.com/.../AM57xx_PCB_Escape_Routing
processors.wiki.ti.com/.../AM572x_Schematic_Checklist
processors.wiki.ti.com/.../Common_DDR_Issues
www.ti.com/.../spraav0a.pdf
processors.wiki.ti.com/.../DDR_Routing_Checklist
processors.wiki.ti.com/.../DM8127_DDR_Config_Resources

Regards,
Pavel

0 yangwoo Lee over 8 years ago in reply to Pavel Botev

Intellectual 910 points

Hi.

That two boards are perfectly same. not only DDR3
Yes, TI u-boot is correct. because we made 10 more same test board, but only one board printing 8GiB

My doubt of u-boot is why print 8GiB at first. after u-boot boot, I can see 2GiB information with "meminfo" command.
Even kernel boot, I can see 2G usable memory(in kernel boot log and /proc/meminfo) and working fine everything.
I have to debug first printing message(8GiB) about DRAM information for first board.

0 Pavel Botev over 8 years ago in reply to yangwoo Lee

TI__Guru**** 170625 points

Yangwoo,

I think that meminfo command is using only omap_sdram_size function (from file hwinit-common.c), which determine the size from the DMM sections configuration (dmm_lisa_map_x).

While when printing 8GiB, the u-boot is using omap_sdram_size and also get_ram_size (from file memsize.c)

void sdram_init(void)
{

/* Do some testing after the init */
if (!in_sdram) {
size_prog = omap_sdram_size();
size_prog = log_2_n_round_down(size_prog);
size_prog = (1 << size_prog);

size_detect = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, size_prog);
}
}

It seems to me that omap_sdram_size() is working fine for you (as it is based on DMM sections), while get_ram_size() is not working fine, as it is checking the actual RAM size in board. You can investigate in that direction. See also the below files:

u-boot/doc/README.memory-test
u-boot/common/memsize.c

Regards,
Pavel

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