TMS320C66x (66AK2H14) Query

Nithin kumar24

Intellectual 905 points

Other Parts Discussed in Thread: 66AK2H14

Hi All,

We are planning to use TMS320C66x (66AK2H14) in one of our project related to handle multiple SRIO signals,

I had gone through TMS320C66x (66AK2H14) data sheet and “http://www.ti.com/tool/bioslinuxmcsdk”.

Please clarify my below queries,

1. Is this SYS/BIOS RTOS is supporting all 8 DSPs in 66AK2H14?

2. Is this BSP Supports 2GB SRAM ?

3. Is both SYS/BIOS and Linux BSPs support SRIO as mentioned in peripherals supported list of above link ?

4. Is this SYS/BIOS BSP supports all peripheral present in the core (I2C, SPI, GBE, RS232 UART etc..,) ?

Thanks and Regards,

Nithin

over 8 years ago

0 Yordan Kovachev over 8 years ago

TI__Guru**** 161600 points

Hi Nithin,

The latest RTOS for 66AK2H14 devices is located here:
software-dl.ti.com/.../index_FDS.html

To answer your questions:
1. Yes, it supports all 8 DSP cores.
2. It should be able to support 2GB SRAM.
3. Yes, it supports all the listed interfaces, see the sw developers guide:
processors.wiki.ti.com/.../Processor_SDK_RTOS_Software_Developer_Guide

Best Regards,
Yordan

0 Nithin kumar24 over 8 years ago in reply to Yordan Kovachev

Intellectual 905 points

Hi Yordan,

Thanks for the reply.

Thanks and Regards,
Nithin

0 Yordan Kovachev over 8 years ago in reply to Nithin kumar24

TI__Guru**** 161600 points

Hi Nithin,

Just one clarification.

2. Is this BSP Supports 2GB SRAM ?

If you're connecting an asynchronous SRAM to the EMIF16, then you need to have in mind that it can address only a total of 256M (64MB per chip select), the rest won't be usable, see its user guide:
www.ti.com/.../sprugz3a.pdf

Best Regards,
Yordan

0 Nithin kumar24 over 8 years ago in reply to Yordan Kovachev

Intellectual 905 points

Hi Yordan,

Thanks for this information,
We had same doubt. Thanks for clearing the same.

Thanks and Regards,
Nithin

0 Nithin kumar24 over 8 years ago in reply to Nithin kumar24

Intellectual 905 points

Hi Yordan,

I have one more query,

Is SYS/BIOS BSP supports Hyperlink connection between 2 SOCs, Is this tested ?
What is the tested throughput of Hyperlink?

As per data sheet it is 50-GBaud.

Thanks and Regards,
Nithin

0 Yordan Kovachev over 8 years ago in reply to Nithin kumar24

TI__Guru**** 161600 points

Hi Nithin,

Yes, Hyperlink supports connection between 2 SoCs, see:
processors.wiki.ti.com/.../Processor_SDK_RTOS_HYPLNK
"All examples can be used in either loopback (on any EVM without any special cables or breakout cards) or with two boards."

As for throughput, see Chapter 8 in the bellow user guide:
www.ti.com/.../sprabk5b.pdf

Best Regards,
Yordan

0 Nithin kumar24 over 8 years ago in reply to Yordan Kovachev

Intellectual 905 points

Hi Yordan,

In current SYS/BIOS BSP, which and all boot medias (SPI NOR, TFTP etc..,) supported in it.

Thanks and Regards,
Nithin

0 Nithin kumar24 over 8 years ago in reply to Nithin kumar24

Intellectual 905 points

Hi Yordan,

Any update on above query.

Thanks and Regards,
Nithin

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TMS320C66x (66AK2H14) Query