how to build hyperlink application in example?

Hi Chanseok,

You first need to run the setupenv.bat.

Then navigate to the hyplink directory & run the make command, as specified in makefile, or use the pdkAppImageCreate.bat/pdkProjectCreate.bat file.

Best Regards,
Yordan

For the DSP side, as long as you got the .out file, it is fine. There is post script to convert .out into a binary image. You don't need that. The .out file is what you need to use to load into DSP and run.

For the ARM side, the package lack of a way to create project fir it. There is a makefile under C:\ti\pdk_k2hk_4_0_3\packages\ti\drv\hyplnk\example\cicInterruptExample\k2h\armv7\linux\build, check if you can build from there.

Regards, Eric

Dear @Yordan,

Thanks for the reply.

Unfortunately, I already did it. As I know, that batch file defines the build environment variable. So I can build example project for dsp. But I want to build example project for arm. cicInterruptexample project(which is included in hyperlink example) also requires application image in arm side.

Regards,

Chanseok.

Dear @lding

Thanks for the reply.

Yes, I found makefile inside that folder. So I execute gmake command to build image. But when I execute that, some errors occur like "no file exists"
Here is build log:

C:\ti\PDK_K2~2\packages\ti\drv\hyplnk\example\cicInterruptExample\k2h\armv7\linux\build>gmake all
makefile:134: warning: overriding commands for target `bin/hyplnk/example/cicInterruptExample_so.out'
makefile:130: warning: ignoring old commands for target `bin/hyplnk/example/cicInterruptExample_so.out'
compiling /ti/PDK_K2~2/packages//ti/drv/hyplnk//example/cicInterruptExample/src/cicInterruptExample.c ...
process_begin: CreateProcess(NULL, cc -c -I. -Wall -O2 -D__ARMv7 -DDEVICE_K2H -D_VIRTUAL_ADDR_SUPPORT -D__LINUX_USER_SPACE -D_LITTLE_ENDIAN=1 -DMAKEFILE_BUILD -DINTERNAL_LINKING_RA
M -I. -I/ti/PDK_K2~2/packages//ti/drv/hyplnk/ -I/ti/PDK_K2~2/packages//ti/csl/ -I/ti/PDK_K2~2/packages/ -I/ti/runtime/hplib/ -I/ti/PDK_K2~2/packages//ti/drv/hyplnk//example/cicInte
rruptExample/src -I/ti/PDK_K2~2/packages//ti/drv/hyplnk//example/cicInterruptExample/../common -I/ti/PDK_K2~2/packages//ti/drv/hyplnk//example/cicInterruptExample//armv7/linux /ti/
PDK_K2~2/packages//ti/drv/hyplnk//example/cicInterruptExample/src/cicInterruptExample.c -o obj/hyplnk/example/cicInterruptExample.o, ...) failed.
make (e=2): the system cannot find the file specified
gmake: *** [obj/hyplnk/example/cicInterruptExample.o] Error 2

I tried to find the cause of build error. And found out that hplib didn`t exist in runtime folder. Is the hplib(explained in -I/ti/runtime/hplib/) requires for building application image? I cannot find any clues of hplib in e2e, ti wiki whatever site...

Thanks for your help.

Chanseok

Chanseok,

Some background of this example:
- The ARM side runs Linux OS
- cicInterruptExample is a Linux user application, and cross compiled with ARM-Linux compiler
- the remote SOC uses Hyperlink to access the local SOC's CIC2 region, then use this CIC2 generate up to 24 interrupts in parallel. (The Hyperlink itself has two interrupt lines, so it can ONLY generate 2 interrupts in parallel)

As this example is a mixture of DSP RTOS on remote side and Linux RTOS on local side, and the Processor SDK RTOS package focus on RTOS only, sorry this example is broken in terms of how to build on ARM Linux side.

As you are trying Hyperlink interrupt with this example, is this your usage case?

Regards, Eric

Dear Eric,

Thanks for the reply.

Yes!
My purpose to run cicInterruptExample on evmK2H board. Through this example, I want to check interrupt handling case among DSP cores in loopback mode.(in this case, I can reuse this example on my custom project). And I also want to know how to generate S/W Interrupt.

Is there any examples related on hyperlink interrupt handling(and interrupt packet generation)? Of course, there is another example named 'memoryMappedExample' But It seems that that example only handles error-related interrupt.

And I have one more question. Can I use cpIntc + eventCombiner instead of using CSL_CPINTC for registering ISR?(same effect?)
Due to the porting old project, we prefer to use previous one.

Thanks for your help.
Chanseok.

Chanseok,

For the cicInterruptExample, the DSP send interrupts to ARM side GIC, the interrupt is hooked by Linux kernel, there are DTS files define how each CIC2 interrupt linked to ARM GIC number. This is not a DSP to DSP interrupt. If you want this example working, I will file a ticket for our dev team how to build the ARM side example. This takes some time.

For the Hyperlink interrupt example on loopback or EVM to EVM case, you can check this thread: e2e.ti.com/.../193417

Also check this link for register ISR processors.wiki.ti.com/.../Configuring_Interrupts_on_Keystone_Devices

Regards, Eric

Dear Eric,

Thanks for your help. I`m looking forward to the example.

Chanseok,

We are still in discussion how to fix this Hyperlink CIC example. Can you let us know what is your usage case and what is your phase in product devleopment or evaluation:

- Do you use Keystone I and/or Keystone II devices?
- Do you use ARM core, if yes, what kinds of OS runs on ARM? Linux or bare metal?
- Which device is connected to which device via Hyperlink?
- The Hyperlink interrupt is one direction or both directions?
- How many parallel interrupts in one direction you need? Can 2 parallel interrupts meet your requirement?

Regards, Eric

Dear Eric,

Thanks for consideration, 

1. I used k2hevm and same dsp(66ak2h12) on our custom platform.

2. Yes, our target is running TI RTOS on our platform. And We considered to use hyperlink for communication between dsp and arm.

3. Actually, I just want to be sure that it is possible to send interrupt from dsp to arm through example. If possible, dsp can notify the data transfer to arm after completion through interrupt, not polling.
    So I don`t care the parallel interrupt handling in this time. Perhaps, It`ll be required in the future..

4. If possible, bi-direction will be nice.

If you don`t mind, May I have a question? Actually, we just implemented hyperlink feature on our platform. And got 18Gbps of the throughput.
The SerDes configuration is 6.25GBaud with 4 lanes. So there is a gap between them(atmost 4Gbps, I guess). Does the evm board fully support the maximum physical speed of hyperlink in that circumstance?
I refer the performance documentation from TI(HyperLink_Programming_and_Performance_consideration.pdf) And It doesn`t mention about it, I guess.

Thanks again for your help.

Regards,

Chanseok

Thanks again for your help.

Regards,

Chanseok

I see. Now I have to check the way to handle the interrupt handling in ARM BIOS environment.

Thanks for your help!

Chanseok,

"Now I have to check the way to handle the interrupt handling in ARM BIOS environment."========> As we are determining how to fix the "Broken Hyperlink interrupt between ARM running Linux and DSP using bare metal/SYSBIOS", please let us know if you still need this fix or not? Because even we fix it, it is Linux on A15. It doesn't apply to you case if you run ARM BIOS on A15.

Thanks for the understanding!

Regards, Eric

Dear Eric,

Actually, the use case we consider is running hyperlink on SYSBIOS. What I was worried is that, does really hyperlink IP works properly on ARM side(for our custom board) not only Linux environment but also SYSBIOS environment. It means that It doesn`t care about what OS is on ARM, just verify ARM hyperlink path.

So, if you can fix that problem through short period, it will be helpful to check that. But if not, hmmm... our team must find the another way.

Thanks for consideration.

Regards,

Chanseok