Hi Champs,
Could you please let me know about the default OPP settings of ti-u-boot-2016.05 for AM335x EVM?
And, can I check the frequencies at TP31(CLKOUT1) or TP32(CLKOUT2) on the EVM?
u-
Best regards,
j-breeze
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Hi Champs,
Could you please let me know about the default OPP settings of ti-u-boot-2016.05 for AM335x EVM?
And, can I check the frequencies at TP31(CLKOUT1) or TP32(CLKOUT2) on the EVM?
u-
Best regards,
j-breeze
Hi j-breeze,
TI u-boot-2016.05 configures AM335x for OPP100. But OPP100 might vary depending on AM335x silicon revision and package, see AM335x datasheet, section 5.4 Operating Performance Points (OPPs)
The u-boot code that handles this is:
arch/arm/include/asm/arch-am33xx/clocks_am33xx.h -> CONFIG_SYS_MPUCLK
arch/arm/cpu/armv7/am33xx/clock_am33xx.c
arch/arm/cpu/armv7/am33xx/sys_info.c -> am335x_get_efuse_mpu_max_freq()
board/ti/am335x/board.c -> am33xx_spl_board_init()
You can also dump the DPLL_MPU registers with the u-boot md command and check the values of
CM_CLKSEL_DPLL_MPU[6:0] DPLL_DIV -> this is N
CM_CLKSEL_DPLL_MPU[18:8] DPLL_MULT -> this is M
CM_DIV_M2_DPLL_MPU[4:0] DPLL_CLKOUT_DIC -> this is M2
Regards,
Pavel
j-breeze said:And, can I check the frequencies at TP31(CLKOUT1) or TP32(CLKOUT2) on the EVM?
No, you can not check the Cortex-A8 MPU frequency (MPU DPLL output clock) at these pins, CLKOUT1/2. For more info regarding CLKOUT1/2 usage, see AM335x TRM, section 8.1.6.12 CLKOUT Signals
Regards,
Pavel