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C6747: missing RTC interrupts using ECM



I have a project that was using HWI interrupts without ECM that I have been trying to modify to use the ECM.  Without ECM, it hooked INT4 and INT5 to the UART and RTC:

bios.HWI.instance("HWI_INT4").interruptSelectNumber = 69;
bios.HWI.instance("HWI_INT4").fxn = prog.extern("UART2_Interrupt");
bios.HWI.instance("HWI_INT4").useDispatcher = 1;

bios.HWI.instance("HWI_INT5").interruptSelectNumber = 63;
bios.HWI.instance("HWI_INT5").fxn = prog.extern("RTC_Interrupt");
bios.HWI.instance("HWI_INT5").useDispatcher = 1;

The main() function initializes the clock, pins, and enables HWI INT4 & 5 through:

C64_enableIER(C64_EINT4 | C64_EINT5).

I commented out the HWI code above, and turned on the ECM:

bios.ECM.ENABLE = 1;

bios.HWI.instance("HWI_INT7").interruptSelectNumber = 0;
bios.HWI.instance("HWI_INT8").interruptSelectNumber = 1;
bios.HWI.instance("HWI_INT9").interruptSelectNumber = 2;
bios.HWI.instance("HWI_INT10").interruptSelectNumber = 3;

bios.ECM.instance("EVENT63").unmask = 1;
bios.ECM.instance("EVENT63").fxn = prog.extern("RTC_Interrupt");
bios.ECM.instance("EVENT69").unmask = 1;
bios.ECM.instance("EVENT69").fxn = prog.extern("UART2_Interrupt");

In main, the IER enable changed to:

C64_enableIER(C64_EINT7 | C64_EINT8 | C64_EINT9 | C64_EINT10).

The UART interrupts through event 69, HWI_INT8 continue to work properly.  I no longer get RTC interrupts.  I can comment out the ECM event 63 lines and restore RTC on HWI_INT5, and the RTC interrupts come back.  Here, I have the UART on ECM and the RTC directly attached.

What am I doing wrong?

  • Hi Alex,

    I do not know of any inherent issues with using the RTC interrupt through the ECM mux so I am confident this can be done.

    Event 63 will fall under the ECM group '1' so this event should interrupt HWI_INT8. When debugging an issue like this I like to work my way back to see where the interrupt is getting caught.

    For example, after verifying the IER bit for INT8 is enabled try disabling this event and see if the corresponding IFR bit is ever set. If it is then you may need to check the function you are plugging into the vector table for that interrupt. If memory serves this will automatically default to ECM_dispatch in the GUI, but I am not sure if modifying the script will do the same.

    If the IFR is not getting set, work your way back through the series of 'gates' and find where it gets lost. My guess is it will be closer to the end of the path around the IER/vector area because the interrupt works when directly configured.

    I hope this helps, or at least guides you in the right direction. Please let me know if you have made any progress or if you have other questions.

  • I have had some luck by clearing the event flag during initialization (EVTCLR1 |= 0x80000000).  I don't see an ECM_clearEvent API in DSP/BIOS, so this will have to do.  It looks like the event flag was already set to 1 when I initialized everything.  MEVTFLAG1 has bit 31 set as well.  I suppose the interrupt controller is edge sensitive, and never triggering the ISR.