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AM572x GPMC read from FPGA fails

rafe Husain
Prodigy 60 points

We are using cs0 to link with fpga memory mapped registers using ti 5728 eval board. Able to write fine but unable to read. read data is 0. I follwed the GPMC_AD signals on scope up to the pin and it is correct but the read is always 0.

gpmc read non multiplexed gpmc_config.dat

  • 0
    TI__Guru** 115880 points
    Rafe,

    I don`t see any issue with your GPMC config register setup. Are you reading the data as 16 bit data from your code?? Can you try to set the CCS memory browser in 16 bit mode and open the GPMC direct map space to see if that makes a difference sisnce you have configured the reads to the device as 16 bit NOR flash like memory device.

    Regards,
    Rahul
  • 0 in reply to Rahul Prabhu
    Prodigy 60 points
    found the problem. the GPMC_AD bits need to have their input bits turned on bit 18 in CTRL_CORE_PAD_GPMC_ADx

    WR_MEM_32(0x4A003400, 0x01020000); //CTRL_CORE_PAD_GPMC_AD0
    WR_MEM_32(0x4A003404, 0x01040000); //CTRL_CORE_PAD_GPMC_AD1
    WR_MEM_32(0x4A003408, 0x01040000); //CTRL_CORE_PAD_GPMC_AD2
    WR_MEM_32(0x4A00340C, 0x01040000); //CTRL_CORE_PAD_GPMC_AD3
    WR_MEM_32(0x4A003410, 0x01040000); //CTRL_CORE_PAD_GPMC_AD4
    WR_MEM_32(0x4A003414, 0x01040000); //CTRL_CORE_PAD_GPMC_AD5
    WR_MEM_32(0x4A003418, 0x01040000); //CTRL_CORE_PAD_GPMC_AD6
    WR_MEM_32(0x4A00341C, 0x01040000); //CTRL_CORE_PAD_GPMC_AD7
    WR_MEM_32(0x4A003420, 0x01040000); //CTRL_CORE_PAD_GPMC_AD8
    WR_MEM_32(0x4A003424, 0x01040000); //CTRL_CORE_PAD_GPMC_AD9
    WR_MEM_32(0x4A003428, 0x01040000); //CTRL_CORE_PAD_GPMC_AD10
    WR_MEM_32(0x4A00342C, 0x01040000); //CTRL_CORE_PAD_GPMC_AD11
    WR_MEM_32(0x4A003430, 0x01040000); //CTRL_CORE_PAD_GPMC_AD12
    WR_MEM_32(0x4A003434, 0x01040000); //CTRL_CORE_PAD_GPMC_AD13
    WR_MEM_32(0x4A003438, 0x01040000); //CTRL_CORE_PAD_GPMC_AD14
    WR_MEM_32(0x4A00343C, 0x01040000); //CTRL_CORE_PAD_GPMC_AD15